81
TITLE: A Special-Purpose Language for Implementing Pipelined FPGA-Based Accelerators
AUTHORS: Cristiano B de Oliveira; Ricardo Menotti; Joao M P Cardoso ; Eduardo Marques;
PUBLISHED: 2016, SOURCE: Forum on Specification and Design Languages (FDL) in LANGUAGES, DESIGN METHODS, AND TOOLS FOR ELECTRONIC SYSTEM DESIGN, VOLUME: 385
INDEXED IN: WOS
IN MY: ORCID
82
TITLE: Architecture of computing systems – ARCS 2016: 29th international conference Nuremberg, Germany, April 4-7, 2016 Proceedings
AUTHORS: Frank Hannig; João M P Cardoso ; Thilo Pionteck; Dietmar Fey; Wolfgang Schröder Preikschat; Jürgen Teich;
PUBLISHED: 2016, SOURCE: 29th International Conference on Architecture of Computing Systems, ARCS 2016 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 9637
INDEXED IN: Scopus DBLP CrossRef: 1
IN MY: ORCID | DBLP
83
TITLE: AutoTuning and Adaptivity appRoach for Energy efficient eXascale HPC systems: the ANTAREX Approach
AUTHORS: Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea R Beccari; Luca Benini; Joao Bispo ; Radim Cmar; Joao M P Cardoso ; Carlo Cavazzoni; Jan Martinovic; Gianluca Palermo; Martin Palkovic; Pedro Pinto ; Erven Rohou; Nico Sanna; Katerina Slaninova;
PUBLISHED: 2016, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
INDEXED IN: Scopus WOS DBLP
IN MY: ORCID | DBLP
84
TITLE: Clustering-Based Selection for the Exploration of Compiler Optimization Sequences  Full Text
AUTHORS: Luiz G A Martins; Ricardo Nobre ; Joao M P Cardoso ; Alexandre C B Delbem; Eduardo Marques;
PUBLISHED: 2016, SOURCE: ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, VOLUME: 13, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef: 25
IN MY: ORCID | DBLP
85
TITLE: High-Level Synthesis
AUTHORS: João M P Cardoso ; Markus Weinhardt;
PUBLISHED: 2016, SOURCE: FPGAs for Software Programmers
INDEXED IN: CrossRef: 1
IN MY: ORCID
86
TITLE: High-Level Synthesis
AUTHORS: João M. P. Cardoso ; Markus Weinhardt;
PUBLISHED: 2016, SOURCE: FPGAs for Software Programmers
INDEXED IN: DBLP
IN MY: ORCID | DBLP
87
TITLE: Message from general and program co-chairs
AUTHORS: Silvano, C; Cardoso, JMP ; Agosta, G; Huebner, M;
PUBLISHED: 2016, SOURCE: 7th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 5th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms, PARMA-DITAM 2016 in ACM International Conference Proceeding Series, VOLUME: Part F18-January-2016
INDEXED IN: Scopus
IN MY: ORCID
88
TITLE: Performance-driven instrumentation and mapping strategies using the LARA aspect-oriented programming approach. INSTRUMENTATION AND MAPPING STRATEGIES WITH THE LARA AOP APPROACH  Full Text
AUTHORS: Joao M P Cardoso ; Jose G F Coutinho; Tiago Carvalho; Pedro C Diniz ; Zlatko Petrov; Wayne Luk; Fernando Goncalves;
PUBLISHED: 2016, SOURCE: SOFTWARE-PRACTICE & EXPERIENCE, VOLUME: 46, ISSUE: 2
INDEXED IN: Scopus WOS DBLP CrossRef: 13
IN MY: ORCID | DBLP
89
TITLE: Pipelining data-dependent tasks in FPGA-based multicore architectures  Full Text
AUTHORS: Ali Azarian ; Joao M P Cardoso ;
PUBLISHED: 2016, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 42
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID | DBLP
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