Mário Pereira Véstias


AuthID: R-000-CZ3

Confirmed Publications: 122



41
TITLE: Exploring Data Size to Run Convolutional Neural Networks in Low Density FPGAs
AUTHORS: Gonçalves, A; Peres, T; Véstias, M ;
PUBLISHED: 2019, SOURCE: 15th International Symposium on Applied Reconfigurable Computing, ARC 2019 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 11444 LNCS
INDEXED IN: Scopus CrossRef: 4
IN MY: ORCID | CIÊNCIAVITAE
42
TITLE: Fast convolutional neural networks in low density FPGAs using zero-skipping and weight pruning
AUTHORS: Véstias, MP ; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2019, SOURCE: Electronics (Switzerland), VOLUME: 8, ISSUE: 11
INDEXED IN: Scopus CrossRef: 13
IN MY: ORCID | CIÊNCIAVITAE
43
TITLE: Fast Convolutional Neural Networks in Low Density FPGAs Using Zero-Skipping and Weight Pruning  Full Text
AUTHORS: Vestias, MP ; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2019, SOURCE: ELECTRONICS, VOLUME: 8, ISSUE: 11
INDEXED IN: WOS
IN MY: ORCID | CIÊNCIAVITAE
44
TITLE: Faster Convolutional Neural Networks in Low Density FPGAs Using Block Pruning
AUTHORS: Peres, T; Gonçalves, A; Véstias, M ;
PUBLISHED: 2019, SOURCE: 15th International Symposium on Applied Reconfigurable Computing, ARC 2019 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 11444 LNCS
INDEXED IN: Scopus CrossRef: 5 Handle
IN MY: ORCID | CIÊNCIAVITAE
45
TITLE: High-Performance Reconfigurable Computing
AUTHORS: Mário Pereira Vestias ;
PUBLISHED: 2019, SOURCE: Advances in Computer and Electrical Engineering - Advanced Methodologies and Technologies in Network Architecture, Mobile Computing, and Data Analytics
INDEXED IN: CrossRef
IN MY: ORCID | CIÊNCIAVITAE
46
TITLE: Hybrid Dot-Product Calculation for Convolutional Neural Networks in FPGA
AUTHORS: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLISHED: 2019, SOURCE: 29th International Conference on Field-Programmable Logic and Applications (FPL) in 2019 29TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
INDEXED IN: Scopus WOS CrossRef: 6
IN MY: ORCID | CIÊNCIAVITAE
47
TITLE: Hyperspectral Compressive Sensing - A Comparison of embedded GPU and ARM implementations
AUTHORS: Nascimento, JMP; Vestias, M ;
PUBLISHED: 2019, SOURCE: Conference on Emerging Imaging and Sensing Technologies for Security and Defence IV part of SPIE Security + Defence Symposium in EMERGING IMAGING AND SENSING TECHNOLOGIES FOR SECURITY AND DEFENCE IV, VOLUME: 11163
INDEXED IN: Scopus WOS CrossRef: 1
IN MY: ORCID | CIÊNCIAVITAE
48
TITLE: Low energy heterogeneous computing with multiple RISC-V and CGRA cores
AUTHORS: Fiolhais, L; Gonçalves, F; Duarte, RP; Véstias, M ; De Sousa, JT;
PUBLISHED: 2019, SOURCE: 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 2019-May
INDEXED IN: Scopus CrossRef: 5
IN MY: ORCID | CIÊNCIAVITAE
49
TITLE: Low Energy Heterogeneous Computing with Multiple RISC-V and CGRA Cores
AUTHORS: Fiolhais, L; Goncalves, F; Duarte, RP; Vestias, M ; Sousa, JT;
PUBLISHED: 2019, SOURCE: IEEE International Symposium on Circuits and Systems (IEEE ISCAS) in 2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: WOS
IN MY: ORCID | CIÊNCIAVITAE
50
TITLE: Viterbi Decoder in Hardware
AUTHORS: Mário Pereira Véstias ;
PUBLISHED: 2019, SOURCE: Advances in Computer and Electrical Engineering - Advanced Methodologies and Technologies in Network Architecture, Mobile Computing, and Data Analytics
INDEXED IN: CrossRef
IN MY: ORCID | CIÊNCIAVITAE
Page 5 of 13. Total results: 122.

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