31
TITLE: Uncertainty in DLL deskewing schemes
AUTHORS: Figueiredo, M ; Aguiar, RL ;
PUBLISHED: 2012, SOURCE: 2012 19th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2012 in 2012 19th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2012
INDEXED IN: Scopus CrossRef
32
TITLE: Dynamic Jitter Accumulation in Clock Repeaters Considering Power and Ground Noise Correlations
AUTHORS: Monica Figueiredo ; Rui L Aguiar ;
PUBLISHED: 2011, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: Scopus WOS CrossRef: 1
33
TITLE: Clock Repeater Characterization for Jitter-Aware Clock Tree Synthesis
AUTHORS: Figueiredo, M ; Aguiar, RL ;
PUBLISHED: 2010, SOURCE: 19th International Workshop on Power and Timing Modeling, Optimization and Simulation in INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 5953
INDEXED IN: Scopus WOS CrossRef: 1
IN MY: ORCID
34
TITLE: A Study on CMOS Time Uncertainty with Technology Scaling
AUTHORS: Monica Figueiredo ; Rui L Aguiar ;
PUBLISHED: 2009, SOURCE: 18th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) in INTEGRATED CIRCUIT AND SYSTEMS DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 5349
INDEXED IN: Scopus WOS CrossRef: 1
35
TITLE: Time Precision Comparison of Digitally Controlled Delay Elements
AUTHORS: Monica Figueiredo ; Rui L Aeuiar ;
PUBLISHED: 2009, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS 2009) in ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5
INDEXED IN: Scopus WOS CrossRef: 4
36
TITLE: Predicting noise and jitter in CMOS inverters
AUTHORS: Monica Figueiredo ; Rui L Aguiar ;
PUBLISHED: 2007, SOURCE: Conference on Ph D Research in MicroElectronics and Electronics in 2007 PH.D RESEARCH IN MICROELECTRONICS AND ELECTRONICS
INDEXED IN: Scopus WOS CrossRef: 4
37
TITLE: Noise and jitter in CMOS digitally controlled delay lines
AUTHORS: Monica J Figueiredo ; Rui L Aguiar ;
PUBLISHED: 2006, SOURCE: 13th IEEE International Conference on Electronics, Circuits and Systems in 2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3
INDEXED IN: Scopus WOS CrossRef: 4
38
TITLE: Design and performance of 155 Mbps clock/data recovery circuits on heavy loaded PLDs  Full Text
AUTHORS: Aguiar, RL ; Figueiredo, M ;
PUBLISHED: 2005, SOURCE: 10th IEEE International Conference on Electronics, Circuits and Systems in ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 43, ISSUE: 2
INDEXED IN: WOS CrossRef
39
TITLE: Performance of 155MBPS clock/data recovery circuits on heavy loaded PLDS
AUTHORS: Figueiredo, M ; Aguiar, RL ;
PUBLISHED: 2003, SOURCE: 10th IEEE International Conference on Electronics, Circuits and Systems in ICECS 2003: PROCEEDINGS OF THE 2003 10TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3, VOLUME: 2
INDEXED IN: Scopus WOS CrossRef
40
TITLE: Resource constrained clock recovery on programmable logic devices
AUTHORS: Aguiar, RL ; Figueiredo, M ;
PUBLISHED: 2002, SOURCE: 9th IEEE International Conference on Electronics, Circuits and Systems in ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS, VOLUME: 3
INDEXED IN: Scopus WOS CrossRef: 1
Page 4 of 4. Total results: 40.