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TITLE: ASSUMEs: Heuristic algorithms for optimization of area and delay in digital filter synthesis
AUTHORS: Levent Aksoy ; Eduardo Costa; Paulo Flores ; Jose Monteiro ;
PUBLISHED: 2006, SOURCE: 13th IEEE International Conference on Electronics, Circuits and Systems in 2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3

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TITLE: Exploiting general coefficient representation for the optimal sharing of partial products in MCMs
AUTHORS: Costa, E; Flores, P ; Monteiro, J ;
PUBLISHED: 2006, SOURCE: SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design in SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design, VOLUME: 2006

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TITLE: Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming Full Text
AUTHORS: Levent Aksoy ; Eduardo Costa; Paulo Flores ; Jose Monteiro ;
PUBLISHED: 2006, SOURCE: 43rd Design Automation Conference in 43rd Design Automation Conference, Proceedings 2006

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TITLE: An exact algorithm for the maximal sharing of partial terms in Multiple Constant Multiplications Full Text
AUTHORS: Flores, P ; Monteiro, J ; Costa, E;
PUBLISHED: 2005, SOURCE: IEEE/ACM International Conference on Computer Aided Design in ICCAD-2005: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, VOLUME: 2005

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TITLE: Maximal sharing of partial terms in MCM under minimal signed digit representation
AUTHORS: da Costa, E; Flores, P ; Monteiro, J ;
PUBLISHED: 2005, SOURCE: European Conference on Circuit Theory and Design in Proceedings of the 2005 European Conference on Circuit Theory and Design, Vol 2, VOLUME: 2

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TITLE: An exact solution to the minimum size test pattern problem Full Text
AUTHORS: Flores, PF ; Neto, HC ; Marques Silva, JP ;
PUBLISHED: 2001, SOURCE: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, VOLUME: 6, ISSUE: 4

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TITLE: Assignment and reordering of incompletely specified pattern sequences targetting minimum power dissipation
AUTHORS: Flores, P ; Costa, J; Neto, H ; Monteiro, J ; Marques Silva, J ;
PUBLISHED: 1999, SOURCE: 12th International Conference on VLSI Design in TWELFTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS

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TITLE: On applying set covering models to test set compaction Full Text
AUTHORS: Flores, PF ; Neto, HC ; Marques Silva, JP ;
PUBLISHED: 1999, SOURCE: 9th Great Lakes Symposium on VLSI (GLSVLSI 99) in NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS

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CrossRef: 13

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TITLE: Test pattern generation for width compression in BIST
AUTHORS: Flores, P ; Neto, H ; Chakrabarty, K; Marques Silva, J ;
PUBLISHED: 1999, SOURCE: 1999 IEEE International Symposium on Circuits and Systems (ISCAS 99) in ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, VOLUME: 1

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