11
TITLE: Secure partial dynamic reconfiguration with unsecured external memory
AUTHORS: Kashyap, H; Chaves, R ;
PUBLISHED: 2014, SOURCE: 24th International Conference on Field Programmable Logic and Applications, FPL 2014 in Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
INDEXED IN: Scopus CrossRef
IN MY: ORCID
12
TITLE: Transparent Application Acceleration by Intelligent Scheduling of Shared Library Calls on Heterogeneous Systems
AUTHORS: Colaco, J; Matoga, A; Ilic, A ; Roma, N ; Tomas, P ; Chaves, R ;
PUBLISHED: 2014, SOURCE: 10th International Conference on Parallel Processing and Applied Mathematics (PPAM) in PARALLEL PROCESSING AND APPLIED MATHEMATICS (PPAM 2013), PT I, VOLUME: 8384, ISSUE: PART 1
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID
13
TITLE: A Compact and Scalable RNS Architecture  Full Text
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2013, SOURCE: IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in PROCEEDINGS OF THE 2013 IEEE 24TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 13)
INDEXED IN: Scopus WOS DBLP CrossRef: 2
IN MY: ORCID
14
TITLE: A flexible shared library profiler for early estimation of performance gains in heterogeneous systems
AUTHORS: Matoga, A; Chaves, R ; Tomas, P ; Roma, N ;
PUBLISHED: 2013, SOURCE: 2013 11th International Conference on High Performance Computing and Simulation, HPCS 2013 in Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013
INDEXED IN: Scopus CrossRef: 1
IN MY: ORCID
15
TITLE: HotStream: Efficient Data Streaming of Complex Patterns to Multiple Accelerating Kernels  Full Text
AUTHORS: Sergio Paiagua; Frederico Pratas; Pedro Tomas ; Nuno Roma ; Ricardo Chaves ;
PUBLISHED: 2013, SOURCE: 25th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD) in 2013 25TH INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD)
INDEXED IN: Scopus WOS CrossRef: 3
IN MY: ORCID
16
TITLE: Method to Design General RNS Reverse Converters for Extended Moduli Sets
AUTHORS: Pettenghi, H ; Chaves, R ; Sousa, L ;
PUBLISHED: 2013, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, VOLUME: 60, ISSUE: 12
INDEXED IN: Scopus WOS DBLP CrossRef: 19
IN MY: ORCID
17
TITLE: On the Design of RNS Reverse Converters for the Four-Moduli Set {2<i><SUP>n</SUP></i>+1, 2<i><SUP>n</SUP></i>-1, 2<i><SUP>n</SUP></i>, 2<SUP><i>n</i>+1</SUP>+1}  Full Text
AUTHORS: Sousa, L ; Antao, S; Chaves, R ;
PUBLISHED: 2013, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 21, ISSUE: 10
INDEXED IN: Scopus WOS DBLP CrossRef: 25
IN MY: ORCID
18
TITLE: RNS Reverse Converters for Moduli Sets With Dynamic Ranges up to (8<i>n</i>+1)-bit
AUTHORS: Pettenghi, H ; Chaves, R ; Sousa, L ;
PUBLISHED: 2013, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, VOLUME: 60, ISSUE: 6
INDEXED IN: Scopus WOS DBLP CrossRef: 38
IN MY: ORCID
19
TITLE: SCALABLE AND HIGH THROUGHPUT BIOSENSING PLATFORM
AUTHORS: Jose Leitao; Jose Germano; Nuno Roma ; Ricardo Chaves ; Pedro Tomas ;
PUBLISHED: 2013, SOURCE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
INDEXED IN: Scopus WOS CrossRef: 3
IN MY: ORCID
20
TITLE: Reconfigurable Architecture for Cryptography over Binary Finite Fields
AUTHORS: Antao, S; Chaves, R ; Sousa, L ;
PUBLISHED: 2012, SOURCE: Embedded Systems: Hardware, Design, and Implementation
INDEXED IN: Scopus CrossRef
IN MY: ORCID
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