121
TITLE: Circuit partitioning techniques for power estimation using the full set of input correlations
AUTHORS: Ana T Freitas; Arlindo L Oliveira ;
PUBLISHED: 2001, SOURCE: Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001
INDEXED IN: DBLP
IN MY: DBLP
122
TITLE: Efficient algorithms for the inference of minimum size DFAs  Full Text
AUTHORS: Oliveira, AL ; Silva, JPM ;
PUBLISHED: 2001, SOURCE: MACHINE LEARNING, VOLUME: 44, ISSUE: 1-2
INDEXED IN: Scopus WOS DBLP CrossRef: 25
123
124
TITLE: Techniques for the creation of digital watermarks in sequential circuit designs  Full Text
AUTHORS: Oliveira, AL ;
PUBLISHED: 2001, SOURCE: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOLUME: 20, ISSUE: 9
INDEXED IN: Scopus WOS DBLP CrossRef
125
TITLE: An exact gate assignment algorithm for tree circuits under rise and fall delays
AUTHORS: Oliveira, AL ; Murgai, R;
PUBLISHED: 2000, SOURCE: IEEE/ACM International Conference on Computer Aided Design (ICCAD-2000) in ICCAD - 2000 : IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN
INDEXED IN: Scopus WOS DBLP CrossRef
126
TITLE: FSM decomposition by direct circuit manipulation applied to low power design
AUTHORS: Monteiro, JC ; Oliveira, AL ;
PUBLISHED: 2000, SOURCE: 2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000 in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID | DBLP
128
TITLE: Integrating dynamic power management in the design flow
AUTHORS: Mota, A; Ferreira, N; Oliveira, A ; Monteiro, J ;
PUBLISHED: 2000, SOURCE: IFIP 10th International Conference on Very Large Scale Integration (VLSI 99) in VLSI: SYSTEMS ON A CHIP, VOLUME: 34
INDEXED IN: WOS DBLP
IN MY: DBLP
129
TITLE: A new algorithm for exact reduction of incompletely specified finite state machines  Full Text
AUTHORS: Pena, JM; Oliveira, AL ;
PUBLISHED: 1999, SOURCE: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOLUME: 18, ISSUE: 11
INDEXED IN: Scopus WOS DBLP CrossRef
130
TITLE: Robust techniques for watermarking sequential circuit designs  Full Text
AUTHORS: Oliveira Arlindo, L ;
PUBLISHED: 1999, SOURCE: Proceedings of the 1999 36th Annual Design Automation Conference (DAC) in Proceedings - Design Automation Conference
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID | DBLP
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