João Manuel Paiva Cardoso


AuthID: R-000-75E

Confirmed Publications: 270



261
TITLE: Fast and guaranteed C compilation onto the PACT-XPP (TM) reconfigurable computing platform
AUTHORS: Cardoso, JMP ; Weinhardt, M;
PUBLISHED: 2002, SOURCE: 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines in 10TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS, VOLUME: 2002-January
INDEXED IN: Scopus WOS DBLP CrossRef: 4
IN MY: ORCID | DBLP | CIÊNCIAVITAE
262
TITLE: XPP-VC: A C Compiler with temporal partitioning for the PACT-XPP architecture
AUTHORS: Cardoso, JMP ; Weinhardt, M;
PUBLISHED: 2002, SOURCE: 12th International Conference on Field-Programmable Logic and Applications in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS: RECONFIGURABLE COMPUTING IS GOING MAINSTREAM, VOLUME: 2438
INDEXED IN: Scopus WOS DBLP CrossRef: 15
IN MY: ORCID | ResearcherID | DBLP | CIÊNCIAVITAE
263
TITLE: Compilation increasing the scheduling scope for multi-memory-FPGA-based custom computing machines
AUTHORS: Cardoso, JMP ; Neto, HC;
PUBLISHED: 2001, SOURCE: 11th International Conference on Field-Programmable Logic and Applications, FPL 2001 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 2147
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID | ResearcherID | DBLP
264
TITLE: Novel Algorithm Combining Temporal Partitioning and Sharing of Functional Units
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2001, SOURCE: 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2001 in Proceedings - 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2001
INDEXED IN: Scopus DBLP
IN MY: ORCID | DBLP | CIÊNCIAVITAE
265
TITLE: An enhanced static-list scheduling algorithm for temporal partitioning onto RPUs
AUTHORS: Cardoso, JMP ; Neto, HC;
PUBLISHED: 2000, SOURCE: IFIP 10th International Conference on Very Large Scale Integration (VLSI 99) in VLSI: SYSTEMS ON A CHIP, VOLUME: 34
INDEXED IN: WOS DBLP CrossRef: 10
IN MY: ORCID | ResearcherID | DBLP
266
267
TITLE: Fast hardware compilation of behaviors into an FPGA-based dynamic reconfigurable computing system
AUTHORS: Joéo M P Cardoso ; Horácio C Neto;
PUBLISHED: 1999, SOURCE: Proceedings - 12th Symposium on Integrated Circuits and Systems Design, SBCCI 1999
INDEXED IN: Scopus CrossRef: 3
IN MY: ORCID | CIÊNCIAVITAE
268
TITLE: Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System
AUTHORS: João M P Cardoso ; Horácio C Neto ;
PUBLISHED: 1999, SOURCE: Proceedings of the 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCMM 1999) in 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA
INDEXED IN: Scopus DBLP CrossRef: 15
IN MY: ORCID | DBLP | CIÊNCIAVITAE
269
TITLE: Towards an automatic path from JavaTM bytecodes to hardware through high-level synthesis
AUTHORS: Cardoso Joao, MP ; Neto Horacio, C;
PUBLISHED: 1998, SOURCE: Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology in Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, VOLUME: 1
INDEXED IN: Scopus
IN MY: ORCID | CIÊNCIAVITAE
270
TITLE: Towards an automatic path from JavaTM bytecodes to hardware through high-level synthesis
AUTHORS: João M P Cardoso ; Horácio C Neto;
PUBLISHED: 1998, SOURCE: 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998
INDEXED IN: DBLP CrossRef: 7
IN MY: ORCID | DBLP | CIÊNCIAVITAE
Page 27 of 27. Total results: 270.

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