Leonel Augusto Pires Seabra Sousa


AuthID: R-000-93B

Confirmed Publications: 370



101
TITLE: 2n RNS Scalers for Extended 4-Moduli Sets
AUTHORS: Leonel Sousa ;
PUBLISHED: 2015, SOURCE: IEEE Trans. Computers, VOLUME: 64, ISSUE: 12
INDEXED IN: DBLP CrossRef
IN MY: ORCID | DBLP | CIÊNCIAVITAE
102
TITLE: Accelerating Phylogenetic Inference on Heterogeneous OpenCL platforms
AUTHORS: Kuan, L; Sousa, L ; Tomas, P ;
PUBLISHED: 2015, SOURCE: 13th IEEE International Symposium on Parallel and Distributed Processing with Applications in 2015 IEEE TRUSTCOM/BIGDATASE/ISPA, VOL 3, VOLUME: 3
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID
103
TITLE: Arithmetic-Based Binary-to-RNS Converter Modulo {2(n)+/- k} for jn-Bit Dynamic Range  Full Text
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2015, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 23, ISSUE: 3
INDEXED IN: Scopus WOS DBLP
IN MY: ResearcherID | DBLP
104
TITLE: Arithmetic-based binary-to-RNS converter modulo {2n±k} for -bit dynamic range
AUTHORS: Matutino, PM; Chaves, R; Sousa, L ;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
INDEXED IN: Scopus
IN MY: ORCID | CIÊNCIAVITAE
105
TITLE: Attaining Performance Fairness in big.LITTLE systems
AUTHORS: Gaspar, F; Tanica, L; Tomas, P ; Ilic, A; Sousa, L ;
PUBLISHED: 2015, SOURCE: 12th International Workshop on Intelligent Solutions in Embedded Systems (WISES) in 2015 12TH INTERNATIONAL WORKSHOP ON INTELLIGENT SOLUTIONS IN EMBEDDED SYSTEMS (WISES)
INDEXED IN: Scopus WOS DBLP
IN MY: ORCID
106
TITLE: Base Transformation With Injective Residue Mapping for Dynamic Range Reduction in RNS
AUTHORS: Tay, TF; Chang, CH; Sousa, L ;
PUBLISHED: 2015, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, VOLUME: 62, ISSUE: 9
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID
107
TITLE: Featuring Immediate Revocation in Mikey-sakke (FIRM)
AUTHORS: Martins, P; Sousa, L ; Chawan, P;
PUBLISHED: 2015, SOURCE: IEEE International Symposium on Multimedia (ISM) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON MULTIMEDIA (ISM)
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID
108
TITLE: GPU Acceleration of the HEVC Decoder Inter Prediction Module
AUTHORS: de Souza, DF; Ilic, A; Roma, N ; Sousa, L ;
PUBLISHED: 2015, SOURCE: IEEE Global Conference on Signal and Information Processing (GlobalSIP) in 2015 IEEE GLOBAL CONFERENCE ON SIGNAL AND INFORMATION PROCESSING (GLOBALSIP)
INDEXED IN: Scopus WOS DBLP CrossRef: 3
IN MY: ORCID
109
TITLE: HEVC In-Loop Filters GPU Parallelization in Embedded Systems
AUTHORS: de Souza, DF; Ilic, A; Roma, N ; Sousa, L ;
PUBLISHED: 2015, SOURCE: International Conference on Embedded Computer Systems Architectures Modeling and Simulation in Proceedings International Conference on Embedded Computer Systems - Architectures, Modeling and Simulation (SAMOS XV)
INDEXED IN: Scopus WOS DBLP CrossRef: 13
IN MY: ORCID
110
TITLE: High performance IP core for HEVC quantization
AUTHORS: Dias, T; Roma, N ; Sousa, L ;
PUBLISHED: 2015, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
INDEXED IN: Scopus WOS DBLP CrossRef: 4
IN MY: ORCID
Page 11 of 37. Total results: 370.

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