Leonel Augusto Pires Seabra Sousa


AuthID: R-000-93B

Confirmed Publications: 387



351
TITLE: On task scheduling accuracy: Evaluation methodology and results  Full Text
AUTHORS: Sinnen, O; Sousa, L ;
PUBLISHED: 2004, SOURCE: JOURNAL OF SUPERCOMPUTING, VOLUME: 27, ISSUE: 2
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352
TITLE: On the performance of Maestro2 high performance network equipment, using new improvement techniques  Full Text
AUTHORS: Yamagiwa, S; Ono, M; Ferreira, K; Wada, K; Campos, LM; Fukuda, M; Aoki, K; Sousa, L ;
PUBLISHED: 2004, SOURCE: 23rd IEEE International Performance, Computing, and Communications Conference (IPCCC 2004) in CONFERENCE PROCEEDINGS OF THE 2004 IEEE INTERNATIONAL PERFORMANCE, COMPUTING, AND COMMUNICATIONS CONFERENCE, VOLUME: 23
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353
TITLE: Task scheduling: Considering the processor involvement in communication
AUTHORS: Sinnen, O; Sousa, L ;
PUBLISHED: 2004, SOURCE: 3rd International Symposium on Parallel and Distributed Computing (ISPDC 2004)/3rd International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Networks (HeteroPar 04) in ISPDC 2004: THIRD INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED COMPUTING/HETEROPAR '04: THIRD INTERNATIONAL WORKSHOP ON ALGORITHMS, MODELS AND TOOLS FOR PARALLEL COMPUTING ON HETEROGENEOUS NETWORKS, PROCEEDINGS
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354
TITLE: {2(n)+1, 2(,)(n+k) 2(n)-1} : A new RNS moduli set extension
AUTHORS: Chaves, R ; Sousa, L ;
PUBLISHED: 2004, SOURCE: EUROMICRO Systems on Digital System Design in PROCEEDINGS OF THE EUROMICRO SYSTEMS ON DIGITAL SYSTEM DESIGN
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355
TITLE: A FPL bioinspired visual encoding system to stimulate cortical neurons in real-time
AUTHORS: Sousa, L ; Tomas, P ; Pelayo, F; Martinez, A; Morillas, CA; Romero, S;
PUBLISHED: 2003, SOURCE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
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356
TITLE: Algorithm for modulo (2(n)+1) multiplication  Full Text
AUTHORS: Sousa, LA ;
PUBLISHED: 2003, SOURCE: ELECTRONICS LETTERS, VOLUME: 39, ISSUE: 9
INDEXED IN: Scopus WOS CrossRef
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357
TITLE: Automatic synthesis of motion estimation processors based on a new class of hardware architectures
AUTHORS: Roma, N ; Sousa, L ;
PUBLISHED: 2003, SOURCE: IEEE Workshop on Signal Processing, Systems Design and Implementation (SiPS 01) in JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 34, ISSUE: 3
INDEXED IN: Scopus WOS DBLP CrossRef: 1
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358
TITLE: Customisable core-based architectures for real-time motion estimation on FPGAs
AUTHORS: Roma, N ; Dias, T; Sousa, L ;
PUBLISHED: 2003, SOURCE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
INDEXED IN: Scopus WOS DBLP CrossRef
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359
TITLE: Experimental evaluation of task scheduling accuracy: Implications for the scheduling model
AUTHORS: Sinnen, O; Sousa, L ;
PUBLISHED: 2003, SOURCE: IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, VOLUME: E86D, ISSUE: 9
INDEXED IN: Scopus WOS
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360
TITLE: Fast transcoding architectures for insertion of non-regular shaped objects in the compresse DCT-domain  Full Text
AUTHORS: Roma, N ; Sousa, L ;
PUBLISHED: 2003, SOURCE: SIGNAL PROCESSING-IMAGE COMMUNICATION, VOLUME: 18, ISSUE: 8
INDEXED IN: WOS
IN MY: ResearcherID
Page 36 of 39. Total results: 387.

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