Leonel Augusto Pires Seabra Sousa


AuthID: R-000-93B

Confirmed Publications: 387



371
TITLE: Parameterizable hardware architectures for automatic synthesis of motion estimation processors
AUTHORS: Roma, N ; Sousa, L ;
PUBLISHED: 2001, SOURCE: IEEE Workshop on Signal Processing, Systems Design and Implementation (SiPS 01) in SIPS 2001: IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION
INDEXED IN: Scopus WOS
IN MY: ORCID | ResearcherID | CIÊNCIAVITAE
372
TITLE: Scheduling task graphs on arbitrary processor architectures considering contention
AUTHORS: Sinnen, O; Sousa, L ;
PUBLISHED: 2001, SOURCE: 9th International Conference on High-Performance Computing and Networking in HIGH-PERFORMANCE COMPUTING AND NETWORKING, VOLUME: 2110
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID | ResearcherID | DBLP | CIÊNCIAVITAE
373
TITLE: Synchronous non-local image processing on Orthogonal Multiprocessor Systems
AUTHORS: Sousa, L ; Sinnen, O;
PUBLISHED: 2001, SOURCE: 4th International Conference on Vector and Parallel Processing (VECPAR 2000) in VECTOR AND PARALLEL PROCESSING - VECPAR 2000, VOLUME: 1981
INDEXED IN: Scopus WOS
IN MY: ORCID | ResearcherID | CIÊNCIAVITAE
374
TITLE: A Platform Independent Parallelising Tool Based on Graph Theoretic Models
AUTHORS: Oliver Sinnen; Leonel Sousa ;
PUBLISHED: 2000, SOURCE: Vector and Parallel Processing - VECPAR 2000, 4th International Conference, Porto, Portugal, June 21-23, 2000, Selected Papers and Invited Talks, VOLUME: 1981
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID | DBLP | CIÊNCIAVITAE
375
TITLE: General method for eliminating redundant computations in video coding
AUTHORS: Sousa, LA ;
PUBLISHED: 2000, SOURCE: ELECTRONICS LETTERS, VOLUME: 36, ISSUE: 4
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID | ResearcherID | CIÊNCIAVITAE
376
TITLE: In the development and evaluation of specialized processors for computing high-order 2-D image moments in real-time
AUTHORS: Roma, N ; Sousa, L ;
PUBLISHED: 2000, SOURCE: 5th IEEE International Workshop on Computer Architectures for Machine Perception (CAMP 2000) in 5TH INTERNATIONAL WORKSHOP ON COMPUTER ARCHITECTURES FOR MACHINE PERCEPTION, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID | ResearcherID | DBLP | CIÊNCIAVITAE
377
TITLE: Synchronous Non-local Image Processing on Orthogonal Multiprocessor Systems
AUTHORS: Leonel Sousa ; Oliver Sinnen;
PUBLISHED: 2000, SOURCE: Vector and Parallel Processing - VECPAR 2000, 4th International Conference, Porto, Portugal, June 21-23, 2000, Selected Papers and Invited Talks, VOLUME: 1981
INDEXED IN: DBLP CrossRef
IN MY: DBLP
378
TITLE: Applying Conditional Processing to Design Low-Power Array Processors for Motion Estimation
AUTHORS: Leonel Augusto Sousa ;
PUBLISHED: 1999, SOURCE: International Conference on Image Processing (ICIP'99) in ICIP (2), VOLUME: 2
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID | DBLP | CIÊNCIAVITAE
379
TITLE: Low-power array architectures for motion estimation
AUTHORS: Leonel Sousa ; Nuno Roma ;
PUBLISHED: 1999, SOURCE: Third IEEE Workshop on Multimedia Signal Processing, MMSP 1999, Copenhagen, Denmark, September 13-15, 1999
INDEXED IN: DBLP CrossRef
IN MY: DBLP
380
TITLE: On the Development of a Video CODEC for Low Bitrate Communication in General Purpose Computers
AUTHORS: Jorge Isidro; Luís Coelho; Kevin Ferreira; Leonel Sousa ;
PUBLISHED: 1999, SOURCE: Proceedings of the 17th IASTED International Conference on Applied Informatics, February 15-18, 1999, Innsbruck, Austria
INDEXED IN: DBLP
IN MY: DBLP
Page 38 of 39. Total results: 387.

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