61
TITLE: Phylogenetic Reconstructions Using an Indicator-Based Bat Algorithm for Multicore Processors
AUTHORS: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Leonel Sousa ;
PUBLISHED: 2018, SOURCE: IEEE International Conference on Bioinformatics and Biomedicine, BIBM 2018, Madrid, Spain, December 3-6, 2018
INDEXED IN: Scopus DBLP CrossRef
62
TITLE: A Multifunctional Unit for Designing Efficient RNS-Based Datapaths
AUTHORS: Molahosseini, AS; Zarandi, AAE; Martins, P; Sousa, L ;
PUBLISHED: 2017, SOURCE: IEEE ACCESS, VOLUME: 5
INDEXED IN: Scopus WOS CrossRef: 11
63
TITLE: A Reduced-Bias Approach With a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo 2<i><SUP>n</SUP></i>+1 Multiplier
AUTHORS: Mirhosseini, SM; Molahosseini, AS; Hosseinzadeh, M; Sousa, L ; Martins, P;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, VOLUME: 64, ISSUE: 7
INDEXED IN: Scopus WOS CrossRef: 7
64
TITLE: A stochastic number representation for fully homomorphic cryptography
AUTHORS: Paulo Martins; Leonel Sousa ;
PUBLISHED: 2017, SOURCE: 2017 IEEE International Workshop on Signal Processing Systems, SiPS 2017 in 2017 IEEE International Workshop on Signal Processing Systems, SiPS 2017, Lorient, France, October 3-5, 2017, VOLUME: 2017-October
INDEXED IN: Scopus DBLP CrossRef: 2
65
TITLE: Accelerating the phylogenetic parsimony function on heterogeneous systems
AUTHORS: Sergio Santander Jiménez; Aleksandar Ilic; Leonel Sousa ; Miguel A Vega Rodríguez;
PUBLISHED: 2017, SOURCE: Concurrency and Computation: Practice and Experience, VOLUME: 29, ISSUE: 8
INDEXED IN: Scopus DBLP CrossRef: 3
66
TITLE: An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form {2(k), 2(P)-1}
AUTHORS: Zarandi, AAE; Molahosseini, AS; Sousa, L ; Hosseinzadeh, M;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 25, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef: 8
67
TITLE: Analyzing Performance of Multi-cores and Applications with Cache-aware Roofline Model
AUTHORS: Marques, D; Duarte, H; Sousa, L ; Ilic, A;
PUBLISHED: 2017, SOURCE: 15th International Conference on High Performance Computing & Simulation (HPCS) in 2017 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS)
INDEXED IN: Scopus WOS CrossRef
68
TITLE: Arithmetical Improvement of the Round-Off for Cryptosystems in High-Dimensional Lattices
AUTHORS: Martins, P; Eynard, J; Bajard, JC; Sousa, L ;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON COMPUTERS, VOLUME: 66, ISSUE: 12
INDEXED IN: Scopus WOS DBLP CrossRef: 4
69
TITLE: Beyond the Roofline: Cache-Aware Power and Energy-Efficiency Modeling for Multi-Cores
AUTHORS: Ilic, A; Pratas, F; Sousa, L ;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON COMPUTERS, VOLUME: 66, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef: 13
70
TITLE: Design Space Exploration of LDPC Decoders Using High-Level Synthesis
AUTHORS: Andrade, J; George, N; Karras, K; Novo, D; Pratas, F; Sousa, L ; Ienne, P; Falcao, G ; Silva, V;
PUBLISHED: 2017, SOURCE: IEEE ACCESS, VOLUME: 5
INDEXED IN: Scopus WOS DBLP CrossRef: 19
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