Mário Pereira Véstias
AuthID: R-000-CZ3
31
TITLE: A Configurable Architecture for Running Hybrid Convolutional Neural Networks in Low-Density FPGAs
AUTHORS: Vestias, MP; Duarte, RP; De Sousa, JT; Neto, HC;
PUBLISHED: 2020, SOURCE: IEEE ACCESS, VOLUME: 8
AUTHORS: Vestias, MP; Duarte, RP; De Sousa, JT; Neto, HC;
PUBLISHED: 2020, SOURCE: IEEE ACCESS, VOLUME: 8
32
TITLE: Hyperspectral Compressive Sensing With a System-On-Chip FPGA
AUTHORS: Nascimento, JMP; Vestias, MP; Martin, G;
PUBLISHED: 2020, SOURCE: IEEE JOURNAL OF SELECTED TOPICS IN APPLIED EARTH OBSERVATIONS AND REMOTE SENSING, VOLUME: 13
AUTHORS: Nascimento, JMP; Vestias, MP; Martin, G;
PUBLISHED: 2020, SOURCE: IEEE JOURNAL OF SELECTED TOPICS IN APPLIED EARTH OBSERVATIONS AND REMOTE SENSING, VOLUME: 13
33
TITLE: Moving Deep Learning to the Edge Full Text
AUTHORS: Vestias, MP; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2020, SOURCE: ALGORITHMS, VOLUME: 13, ISSUE: 5
AUTHORS: Vestias, MP; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2020, SOURCE: ALGORITHMS, VOLUME: 13, ISSUE: 5
INDEXED IN: 
WOS
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ORCID
ORCID34
TITLE: A fast and scalable architecture to run convolutional neural networks in low density FPGAs Full Text
AUTHORS: Vestias, MP; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2020, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 77
AUTHORS: Vestias, MP; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2020, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 77
INDEXED IN: WOS
WOS IN MY: ORCID
ORCID35
TITLE: Efficient Design of Pruned Convolutional Neural Networks on FPGA
AUTHORS: Véstias, M;
PUBLISHED: 2020, SOURCE: Journal of Signal Processing Systems, VOLUME: 93, ISSUE: 5
AUTHORS: Véstias, M;
PUBLISHED: 2020, SOURCE: Journal of Signal Processing Systems, VOLUME: 93, ISSUE: 5
36
TITLE: Efficient Design of Pruned Convolutional Neural Networks on FPGA Full Text
AUTHORS: Mario Vestias;
PUBLISHED: 2020, SOURCE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
AUTHORS: Mario Vestias;
PUBLISHED: 2020, SOURCE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
INDEXED IN: WOS
WOS IN MY: ORCID
ORCID37
TITLE: High-Speed Viterbi Decoder
AUTHORS: Vestias, MP;
PUBLISHED: 2020, SOURCE: Encyclopedia of Information Science and Technology, Fifth Edition
AUTHORS: Vestias, MP;
PUBLISHED: 2020, SOURCE: Encyclopedia of Information Science and Technology, Fifth Edition
38
TITLE: Field-Programmable Gate Array
AUTHORS: Véstias, MP;
PUBLISHED: 2020, SOURCE: Encyclopedia of Information Science and Technology, Fifth Edition
AUTHORS: Véstias, MP;
PUBLISHED: 2020, SOURCE: Encyclopedia of Information Science and Technology, Fifth Edition
39
TITLE: Deep Learning on Edge. Challenges and Trends
AUTHORS: Mário P Véstias;
PUBLISHED: 2020, SOURCE: Advances in Computational Intelligence and Robotics - Smart Systems Design, Applications, and Challenges
AUTHORS: Mário P Véstias;
PUBLISHED: 2020, SOURCE: Advances in Computational Intelligence and Robotics - Smart Systems Design, Applications, and Challenges
40
TITLE: Faster Convolutional Neural Networks in Low Density FPGAs Using Block Pruning
AUTHORS: Peres, T; Gonçalves, A; Véstias, M;
PUBLISHED: 2019, SOURCE: 15th International Symposium on Applied Reconfigurable Computing, ARC 2019 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 11444 LNCS
AUTHORS: Peres, T; Gonçalves, A; Véstias, M;
PUBLISHED: 2019, SOURCE: 15th International Symposium on Applied Reconfigurable Computing, ARC 2019 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 11444 LNCS
