21
TITLE: Fast Convolutional Neural Networks in Low Density FPGAs Using Zero-Skipping and Weight Pruning  Full Text
AUTHORS: Mario P Vestias; Rui Policarpo Duarte; Jose T de Sousa; Horacio C Neto;
PUBLISHED: 2019, SOURCE: ELECTRONICS, VOLUME: 8, ISSUE: 11
INDEXED IN: WOS
22
TITLE: Hyperspectral Compressive Sensing - A Comparison of embedded GPU and ARM implementations
AUTHORS: Jose M P Nascimento; Mario Vestias;
PUBLISHED: 2019, SOURCE: Conference on Emerging Imaging and Sensing Technologies for Security and Defence IV part of SPIE Security + Defence Symposium in EMERGING IMAGING AND SENSING TECHNOLOGIES FOR SECURITY AND DEFENCE IV, VOLUME: 11163
INDEXED IN: Scopus WOS
23
TITLE: Hyperspectral Compressive Sensing - A Low Power Consumption Approach
AUTHORS: Jose M P Nascimento; Mario V'estias; Rui Duarte;
PUBLISHED: 2018, SOURCE: Conference on High-Performance Computing in Geoscience and Remote Sensing VIII in HIGH-PERFORMANCE COMPUTING IN GEOSCIENCE AND REMOTE SENSING VIII, VOLUME: 10792
INDEXED IN: Scopus WOS
24
TITLE: Lite-CNN: A High-Performance Architecture to Execute CNNs in Low Density FPGAs
AUTHORS: Mario Vestias; Rui Policarpo Duarte; Jose T de Sousa; Horacio Neto;
PUBLISHED: 2018, SOURCE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
INDEXED IN: WOS
25
TITLE: Improving the area of fast parallel decimal multipliers  Full Text
AUTHORS: Mario Vestias; Horacio Neto;
PUBLISHED: 2018, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 61
INDEXED IN: WOS
26
TITLE: Decimal addition on FPGA based on a mixed BCD/excess-6 representation  Full Text
AUTHORS: Horacio Neto; Mario Vestias;
PUBLISHED: 2017, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 55
INDEXED IN: Scopus WOS
27
TITLE: Parallel dot-products for deep learning on FPGA
AUTHORS: Vestias, M; Duarte, RP; De Sousa, JT; Neto, H;
PUBLISHED: 2017, SOURCE: 27th International Conference on Field Programmable Logic and Applications, FPL 2017 in 2017 27th International Conference on Field Programmable Logic and Applications, FPL 2017
INDEXED IN: Scopus
28
TITLE: K-means clustering on CGRA
AUTHORS: Joao D Lopes; Jose T de Sousa; Horacio Neto; Mario Vestias;
PUBLISHED: 2017, SOURCE: 27th International Conference on Field Programmable Logic and Applications (FPL) in 2017 27TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
INDEXED IN: WOS
29
TITLE: Parallel Dot-Products for Deep Learning on FPGA
AUTHORS: Mario Vestias; Rui Policarpo Duarte; Jose T de Sousa; Horacio Neto;
PUBLISHED: 2017, SOURCE: 27th International Conference on Field Programmable Logic and Applications (FPL) in 2017 27TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
INDEXED IN: WOS
30
TITLE: System-on-chip field-programmable gate array design for onboard real-time hyperspectral unmixing
AUTHORS: Jose M P Nascimento; Mario Vestias;
PUBLISHED: 2016, SOURCE: JOURNAL OF APPLIED REMOTE SENSING, VOLUME: 10, ISSUE: 1
INDEXED IN: Scopus WOS CrossRef
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