81
TITLE: Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs
AUTHORS: Passes, F; Martins, R; Lourenco, N; Roca, E; Castro Lopez, R; Povoa, R; Canelas, A; Horta, N ; Fernandez, FV;
PUBLISHED: 2018, SOURCE: 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2018 in SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
INDEXED IN: Scopus CrossRef: 1
IN MY: ORCID
82
TITLE: Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology  Full Text
AUTHORS: Passos, F; Martins, R; Lourenco, N; Roca, E; Povoa, R; Canelas, A; Castro Lopez, R; Horta, N ; Fernandez, FV;
PUBLISHED: 2018, SOURCE: 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) / International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Application to Circuit Design (SMACD) in INTEGRATION-THE VLSI JOURNAL, VOLUME: 63
INDEXED IN: Scopus WOS CrossRef: 7
IN MY: ORCID
83
TITLE: Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel
AUTHORS: Pessoa, T; Lourenco, N; Martins, R; Povoa, R; Horta, N ;
PUBLISHED: 2018, SOURCE: 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 in Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, VOLUME: 2018-January
INDEXED IN: Scopus CrossRef: 1
IN MY: ORCID
84
TITLE: On the Exploration of Promising Analog IC Designs via Artificial Neural Networks
AUTHORS: Nuno Lourenço; Joao Rosa; Ricardo Martins; Helena Aidos; António Canelas; Ricardo Povoa; Nuno Horta;
PUBLISHED: 2018, SOURCE: 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2018, Prague, Czech Republic, July 2-5, 2018
INDEXED IN: DBLP
85
TITLE: Analog integrated circuit design automation: Placement, routing and parasitic extraction techniques
AUTHORS: Martins, R; Lourenço, N; Horta, N ;
PUBLISHED: 2016, SOURCE: Analog Integrated Circuit Design Automation: Placement, Routing and Parasitic Extraction Techniques
INDEXED IN: Scopus CrossRef
IN MY: ORCID
86
TITLE: Design Automation Tasks Scheduling for Enhanced Parallel Execution of a State-of-the-Art Layout-Aware Sizing Approach
AUTHORS: David Neves; Ricardo Martins; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2016, SOURCE: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)
INDEXED IN: CrossRef: 2
IN MY: ORCID
87
TITLE: Analog Integrated Circuit Design Automation. Placement, Routing and Parasitic Extraction Techniques
AUTHORS: Ricardo Martins; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2016
INDEXED IN: Openlibrary
IN MY: ORCID
88
TITLE: AIDA-CMK: AIDA-C with MOO framework
AUTHORS: Lourenço, R; Lourenço, N; Horta, N ;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, ISSUE: 9783319159546
INDEXED IN: Scopus CrossRef
IN MY: ORCID
89
TITLE: Conclusion and future work
AUTHORS: Lourenço, R; Lourenço, N; Horta, N ;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, ISSUE: 9783319159546
INDEXED IN: Scopus CrossRef
IN MY: ORCID
90
TITLE: Preface
AUTHORS: Ricardo Lourenço; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, VOLUME: 43, ISSUE: 1-4
INDEXED IN: Scopus CrossRef: 2
IN MY: ORCID
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