91
TITLE: GPU acceleration of the HEVC decoder inter prediction module
AUTHORS: Diego de d Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: IEEE Global Conference on Signal and Information Processing, GlobalSIP 2015 in 2015 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2015, Orlando, FL, USA, December 14-16, 2015
INDEXED IN: Scopus DBLP CrossRef
IN MY: DBLP
92
TITLE: HEVC in-loop filters GPU parallelization in embedded systems
AUTHORS: Diego de d Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: 15th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2015 in 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2015, Samos, Greece, July 19-23, 2015
INDEXED IN: Scopus DBLP CrossRef
IN MY: DBLP
93
TITLE: Attaining performance fairness in big.LITTLE systems
AUTHORS: Francisco Gaspar; Luís Taniça; Pedro Tomás; Aleksandar Ilic; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: 12th International Workshop on Intelligent Solutions in Embedded Systems, WISES 2015, Ancona, Italy, October 29-30, 2015
INDEXED IN: DBLP
IN MY: DBLP
94
TITLE: Attaining Performance Fairness in big.LITTLE systems
AUTHORS: Francisco Gaspar; Luis Tanica; Pedro Tomas ; Aleksandar Ilic; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: 12th International Workshop on Intelligent Solutions in Embedded Systems (WISES) in 2015 12TH INTERNATIONAL WORKSHOP ON INTELLIGENT SOLUTIONS IN EMBEDDED SYSTEMS (WISES)
INDEXED IN: Scopus WOS
95
TITLE: GPU Acceleration of the HEVC Decoder Inter Prediction Module
AUTHORS: Diego F de Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: IEEE Global Conference on Signal and Information Processing (GlobalSIP) in 2015 IEEE GLOBAL CONFERENCE ON SIGNAL AND INFORMATION PROCESSING (GLOBALSIP)
INDEXED IN: WOS
96
TITLE: HEVC In-Loop Filters GPU Parallelization in Embedded Systems
AUTHORS: Diego F de Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: International Conference on Embedded Computer Systems Architectures Modeling and Simulation in Proceedings International Conference on Embedded Computer Systems - Architectures, Modeling and Simulation (SAMOS XV)
INDEXED IN: WOS
97
TITLE: Monitoring Performance and Power for Application Characterization with the Cache-Aware Roofline Model
AUTHORS: Diogo Antao; Luis Tanica; Aleksandar Ilic; Frederico Pratas; Pedro Tomas ; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: 10th International Conference on Parallel Processing and Applied Mathematics (PPAM) in PARALLEL PROCESSING AND APPLIED MATHEMATICS (PPAM 2013), PT I, VOLUME: 8384, ISSUE: PART 1
INDEXED IN: Scopus WOS
98
TITLE: SchedMon: A Performance and Energy Monitoring Tool for Modern Multi-cores
AUTHORS: Luis Tanica; Aleksandar Ilic; Pedro Tomas ; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: 20th Euro-Par International Workshops in EURO-PAR 2014: PARALLEL PROCESSING WORKSHOPS, PT II, VOLUME: 8806
INDEXED IN: Scopus WOS DBLP CrossRef: 7
IN MY: DBLP
99
TITLE: FEVES: Framework for Efficient Parallel Video Encoding on Heterogeneous Systems  Full Text
AUTHORS: Aleksandar Ilic; Svetislav Momcilovic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: 43rd Annual International Conference on Parallel Processing (ICPP) in 2014 43RD INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING (ICPP), VOLUME: 2014-November, ISSUE: November
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: DBLP
100
TITLE: Performance-aware task management and frequency scaling in embedded systems  Full Text
AUTHORS: Gaspar, F; Ilic, A; Tomas, P ; Sousa, L ;
PUBLISHED: 2014, SOURCE: 26th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2014 in Proceedings - Symposium on Computer Architecture and High Performance Computing
INDEXED IN: Scopus DBLP CrossRef: 2
IN MY: DBLP
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