Aleksandar Ilic
AuthID: R-001-NJ1
31
TITLE: Exploring the Binary Precision Capabilities of Tensor Cores for Epistasis Detection
AUTHORS: Ricardo Nobre; Aleksandar Ilic; Sergio Santander Jiménez; Leonel Sousa;
PUBLISHED: 2020, SOURCE: 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), New Orleans, LA, USA, May 18-22, 2020
AUTHORS: Ricardo Nobre; Aleksandar Ilic; Sergio Santander Jiménez; Leonel Sousa;
PUBLISHED: 2020, SOURCE: 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), New Orleans, LA, USA, May 18-22, 2020
INDEXED IN: 
DBLP
DBLP IN MY: DBLP
DBLP32
TITLE: Heterogeneous CPU+iGPU Processing for Efficient Epistasis Detection
AUTHORS: Rafael Campos; Diogo Marques; Sergio Santander Jiménez; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: Euro-Par 2020: Parallel Processing - 26th International Conference on Parallel and Distributed Computing, Warsaw, Poland, August 24-28, 2020, Proceedings, VOLUME: 12247
AUTHORS: Rafael Campos; Diogo Marques; Sergio Santander Jiménez; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: Euro-Par 2020: Parallel Processing - 26th International Conference on Parallel and Distributed Computing, Warsaw, Poland, August 24-28, 2020, Proceedings, VOLUME: 12247
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP33
TITLE: Optimal algorithm for computing Steiner 3-eccentricities of trees
AUTHORS: Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: CoRR, VOLUME: abs/2008.09299
AUTHORS: Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: CoRR, VOLUME: abs/2008.09299
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP34
TITLE: Accelerating 3-Way Epistasis Detection with CPU+GPU Processing
AUTHORS: Ricardo Nobre; Sergio Santander Jiménez; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: Job Scheduling Strategies for Parallel Processing - 23rd International Workshop, JSSPP 2020, New Orleans, LA, USA, May 22, 2020, Revised Selected Papers, VOLUME: 12326
AUTHORS: Ricardo Nobre; Sergio Santander Jiménez; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: Job Scheduling Strategies for Parallel Processing - 23rd International Workshop, JSSPP 2020, New Orleans, LA, USA, May 22, 2020, Revised Selected Papers, VOLUME: 12326
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP35
TITLE: Performance Optimization and Scalability Analysis of the MGB Hydrological Model
AUTHORS: Freitas, HRA; Mendes, CL; Ilic, A;
PUBLISHED: 2020, SOURCE: 27th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC) in 2020 IEEE 27TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, AND ANALYTICS (HIPC 2020)
AUTHORS: Freitas, HRA; Mendes, CL; Ilic, A;
PUBLISHED: 2020, SOURCE: 27th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC) in 2020 IEEE 27TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, AND ANALYTICS (HIPC 2020)
INDEXED IN: 
WOS DBLP
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DBLP36
TITLE: Hungarian algorithm for subcarrier assignment problem using GPU and CUDA Full Text
AUTHORS: Satyendra Singh Yadav; Paulo Alexandre C Crisostomo Lopes; Aleksandar Ilic; Sarat Kumar Patra;
PUBLISHED: 2019, SOURCE: INTERNATIONAL JOURNAL OF COMMUNICATION SYSTEMS, VOLUME: 32, ISSUE: 4
AUTHORS: Satyendra Singh Yadav; Paulo Alexandre C Crisostomo Lopes; Aleksandar Ilic; Sarat Kumar Patra;
PUBLISHED: 2019, SOURCE: INTERNATIONAL JOURNAL OF COMMUNICATION SYSTEMS, VOLUME: 32, ISSUE: 4
INDEXED IN: 
Scopus WOS
Scopus WOS37
TITLE: Hungarian algorithm for subcarrier assignment problem using GPU and CUDA
AUTHORS: Satyendra Singh Yadav; Paulo Alexandre Crisóstomo Lopes; Aleksandar Ilic; Sarat Kumar Patra;
PUBLISHED: 2019, SOURCE: Int. J. Communication Systems, VOLUME: 32, ISSUE: 4
AUTHORS: Satyendra Singh Yadav; Paulo Alexandre Crisóstomo Lopes; Aleksandar Ilic; Sarat Kumar Patra;
PUBLISHED: 2019, SOURCE: Int. J. Communication Systems, VOLUME: 32, ISSUE: 4
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP38
TITLE: HeTM: Transactional Memory for Heterogeneous Systems
AUTHORS: Castro, D; Romano, P ; Ilic, A; Khan, AM;
PUBLISHED: 2019, SOURCE: 28th International Conference on Parallel Architectures and Compilation Techniques (PACT) in 2019 28TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT 2019), VOLUME: 2019-September
AUTHORS: Castro, D; Romano, P ; Ilic, A; Khan, AM;
PUBLISHED: 2019, SOURCE: 28th International Conference on Parallel Architectures and Compilation Techniques (PACT) in 2019 28TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT 2019), VOLUME: 2019-September
39
TITLE: Modeling Non-Uniform Memory Access on Large Compute Nodes with the Cache-Aware Roofline Model
AUTHORS: Nicolas Denoyelle; Brice Goglin; Aleksandar Ilic; Emmanuel Jeannot; Leonel Sousa;
PUBLISHED: 2019, SOURCE: IEEE Trans. Parallel Distrib. Syst., VOLUME: 30, ISSUE: 6
AUTHORS: Nicolas Denoyelle; Brice Goglin; Aleksandar Ilic; Emmanuel Jeannot; Leonel Sousa;
PUBLISHED: 2019, SOURCE: IEEE Trans. Parallel Distrib. Syst., VOLUME: 30, ISSUE: 6
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP40
TITLE: Maximal Diameter on a Class of Circulant Graphs
AUTHORS: Milan Basic; Aleksandar Ilic; Aleksandar Stamenkovic;
PUBLISHED: 2019, SOURCE: Algebraic Informatics - 8th International Conference, CAI 2019, Niš, Serbia, June 30 - July 4, 2019, Proceedings, VOLUME: 11545
AUTHORS: Milan Basic; Aleksandar Ilic; Aleksandar Stamenkovic;
PUBLISHED: 2019, SOURCE: Algebraic Informatics - 8th International Conference, CAI 2019, Niš, Serbia, June 30 - July 4, 2019, Proceedings, VOLUME: 11545
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP