Horácio Cláudio de Campos Neto
AuthID: R-000-5ZS
21
TITLE: Fault-Tolerant Architecture for On-board Dual-Core Synthetic-Aperture Radar Imaging
AUTHORS: Cruz, H; Duarte, RP; Neto, H;
PUBLISHED: 2019, SOURCE: 15th International Symposium on Applied Reconfigurable Computing, ARC 2019 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 11444 LNCS
AUTHORS: Cruz, H; Duarte, RP; Neto, H;
PUBLISHED: 2019, SOURCE: 15th International Symposium on Applied Reconfigurable Computing, ARC 2019 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 11444 LNCS
22
TITLE: Fast convolutional neural networks in low density FPGAs using zero-skipping and weight pruning
AUTHORS: Véstias, MP ; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2019, SOURCE: Electronics (Switzerland), VOLUME: 8, ISSUE: 11
AUTHORS: Véstias, MP ; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2019, SOURCE: Electronics (Switzerland), VOLUME: 8, ISSUE: 11
23
TITLE: Embedded Fault-Tolerant Accelerator Architecture for Synthetic-Aperture Radar Backprojection
AUTHORS: Cruz, H; Duarte, RP; Neto, H;
PUBLISHED: 2019, SOURCE: JOURNAL OF AEROSPACE INFORMATION SYSTEMS, VOLUME: 16, ISSUE: 11
AUTHORS: Cruz, H; Duarte, RP; Neto, H;
PUBLISHED: 2019, SOURCE: JOURNAL OF AEROSPACE INFORMATION SYSTEMS, VOLUME: 16, ISSUE: 11
24
TITLE: Hybrid Dot-Product Calculation for Convolutional Neural Networks in FPGA
AUTHORS: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLISHED: 2019, SOURCE: 29th International Conference on Field-Programmable Logic and Applications (FPL) in 2019 29TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTHORS: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLISHED: 2019, SOURCE: 29th International Conference on Field-Programmable Logic and Applications (FPL) in 2019 29TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
25
TITLE: kNN-STUFF: kNN STreaming Unit for Fpgas
AUTHORS: Vieira, J; Duarte, RP; Neto, HC;
PUBLISHED: 2019, SOURCE: IEEE ACCESS, VOLUME: 7
AUTHORS: Vieira, J; Duarte, RP; Neto, HC;
PUBLISHED: 2019, SOURCE: IEEE ACCESS, VOLUME: 7
26
TITLE: An Efficient Exact Fused Dot Product Processor in FPGA
AUTHORS: Fiolhais, L; Neto, H;
PUBLISHED: 2018, SOURCE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTHORS: Fiolhais, L; Neto, H;
PUBLISHED: 2018, SOURCE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
27
TITLE: Lite-CNN: A High-Performance Architecture to Execute CNNs in Low Density FPGAs
AUTHORS: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLISHED: 2018, SOURCE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTHORS: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLISHED: 2018, SOURCE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
28
TITLE: Stochastic Processors on FPGAs to Compute Sensor Data Towards Fault-Tolerant IoT Systems
AUTHORS: Duarte, RP; Neto, HC;
PUBLISHED: 2018, SOURCE: IEEE Conference on Dependable and Secure Computing (DSC) in 2018 IEEE CONFERENCE ON DEPENDABLE AND SECURE COMPUTING (DSC)
AUTHORS: Duarte, RP; Neto, HC;
PUBLISHED: 2018, SOURCE: IEEE Conference on Dependable and Secure Computing (DSC) in 2018 IEEE CONFERENCE ON DEPENDABLE AND SECURE COMPUTING (DSC)
29
TITLE: Improving the area of fast parallel decimal multipliers
AUTHORS: Vestias, M ; Neto, H;
PUBLISHED: 2018, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 61
AUTHORS: Vestias, M ; Neto, H;
PUBLISHED: 2018, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 61
30
TITLE: FPGA-based OpenCL accelerator for discovering temporal patterns in gene expression data using biclustering
AUTHORS: Rui P Duarte; Lvaro Simes; Rui Henriques; Horácio C Neto;
PUBLISHED: 2018, SOURCE: ACM International Conference Proceeding Series
AUTHORS: Rui P Duarte; Lvaro Simes; Rui Henriques; Horácio C Neto;
PUBLISHED: 2018, SOURCE: ACM International Conference Proceeding Series
