Horácio Cláudio de Campos Neto
AuthID: R-000-5ZS
61
TITLE: Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers
AUTHORS: Mário P Véstias; Horácio C Neto;
PUBLISHED: 2010, SOURCE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication
AUTHORS: Mário P Véstias; Horácio C Neto;
PUBLISHED: 2010, SOURCE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication
62
TITLE: An efficient, low resource, architecture for backpropagation neural networks
AUTHORS: Domingos, PO; Neto, HC;
PUBLISHED: 2005, SOURCE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005
AUTHORS: Domingos, PO; Neto, HC;
PUBLISHED: 2005, SOURCE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005
INDEXED IN: 
Scopus
Scopus IN MY: 
ORCID
ORCID63
TITLE: A modular reconfigurable architecture for efficient fault simulation in digital circuits
AUTHORS: Augusto, JS ; Almeida, CB; Neto, HCC;
PUBLISHED: 2003, SOURCE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
AUTHORS: Augusto, JS ; Almeida, CB; Neto, HCC;
PUBLISHED: 2003, SOURCE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
64
TITLE: DALI: A methodology for the co-design of dataflow applications on hardware/software architectures
AUTHORS: Vestias, MP ; Neto, HC;
PUBLISHED: 2003, SOURCE: 16th Symposium on Integrated Circuits and Systems Design in 16TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, SBCCI 2003, PROCEEDINGS
AUTHORS: Vestias, MP ; Neto, HC;
PUBLISHED: 2003, SOURCE: 16th Symposium on Integrated Circuits and Systems Design in 16TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, SBCCI 2003, PROCEEDINGS
INDEXED IN: 
WOS
WOS65
TITLE: DALI: A methodology for the co-design of dataflow applications on hardware/software architectures [video encoder DSP example]
AUTHORS: Véstias, MP; Neto, HC;
PUBLISHED: 2003, SOURCE: 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003 in Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003
AUTHORS: Véstias, MP; Neto, HC;
PUBLISHED: 2003, SOURCE: 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003 in Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003
INDEXED IN: Scopus
Scopus IN MY: ORCID
ORCID66
TITLE: System-level co-synthesis of dataflow dominated applications on reconfigurable hardware/software architectures Full Text
AUTHORS: Vestias, MP ; Neto, HC;
PUBLISHED: 2002, SOURCE: 13th IEEE International Workshop on Rapid System Prototyping in 13TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS, VOLUME: 2002-January
AUTHORS: Vestias, MP ; Neto, HC;
PUBLISHED: 2002, SOURCE: 13th IEEE International Workshop on Rapid System Prototyping in 13TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS, VOLUME: 2002-January
67
TITLE: Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines
AUTHORS: João M P Cardoso ; Horácio C Neto;
PUBLISHED: 2001, SOURCE: FPL, VOLUME: 2147
AUTHORS: João M P Cardoso ; Horácio C Neto;
PUBLISHED: 2001, SOURCE: FPL, VOLUME: 2147
68
TITLE: Fast hardware compilation of behaviors into an FPGA-based dynamic reconfigurable computing system
AUTHORS: Joéo M P Cardoso ; Horácio C Neto;
PUBLISHED: 1999, SOURCE: Proceedings - 12th Symposium on Integrated Circuits and Systems Design, SBCCI 1999
AUTHORS: Joéo M P Cardoso ; Horácio C Neto;
PUBLISHED: 1999, SOURCE: Proceedings - 12th Symposium on Integrated Circuits and Systems Design, SBCCI 1999
69
TITLE: Towards an automatic path from JavaTM bytecodes to hardware through high-level synthesis
AUTHORS: João M P Cardoso ; Horácio C Neto;
PUBLISHED: 1998, SOURCE: 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998
AUTHORS: João M P Cardoso ; Horácio C Neto;
PUBLISHED: 1998, SOURCE: 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998
70
TITLE: Bitwise encoding of finite state machines
AUTHORS: Jose Monteiro ; James Kukula; Srinivas Devadas; Horacio Neto;
PUBLISHED: 1994, SOURCE: Proceedings of the 7th International Conference on VLSI Design in Proceedings of the IEEE International Conference on VLSI Design
AUTHORS: Jose Monteiro ; James Kukula; Srinivas Devadas; Horacio Neto;
PUBLISHED: 1994, SOURCE: Proceedings of the 7th International Conference on VLSI Design in Proceedings of the IEEE International Conference on VLSI Design
INDEXED IN: Scopus
Scopus IN MY: ORCID
ORCID