Rui Paulo Silva Martins
AuthID: R-002-8AK
181
TITLE: A 13-bit 60MS/s split pipelined ADC with background gain and mismatch error calibration
AUTHORS: Ding, L; Wu, W; Sin, SW; Seng Pan, U; Martins, RP;
PUBLISHED: 2013, SOURCE: 2013 9th IEEE Asian Solid-State Circuits Conference, A-SSCC 2013 in Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013
AUTHORS: Ding, L; Wu, W; Sin, SW; Seng Pan, U; Martins, RP;
PUBLISHED: 2013, SOURCE: 2013 9th IEEE Asian Solid-State Circuits Conference, A-SSCC 2013 in Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013
INDEXED IN:
Scopus
CrossRef


182
TITLE: A 1.7mW 0.22mm(2) 2.4GHz ZigBee RX Exploiting a Current-Reuse Blixer plus Hybrid Filter Topology in 65nm CMOS
AUTHORS: Zhicheng C Lin; Pui In Mak; Rui Martins;
PUBLISHED: 2013, SOURCE: IEEE International Solid-State Circuits Flagship Conference of the IEEE Solid-State-Circuits-Society (ISSCC) in 2013 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS (ISSCC), VOLUME: 56
AUTHORS: Zhicheng C Lin; Pui In Mak; Rui Martins;
PUBLISHED: 2013, SOURCE: IEEE International Solid-State Circuits Flagship Conference of the IEEE Solid-State-Circuits-Society (ISSCC) in 2013 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS (ISSCC), VOLUME: 56
INDEXED IN:
WOS

183
TITLE: Low-complexity, full-resolution, mirror-switching digital predistortion scheme for polar-modulated power amplifiers Full Text
AUTHORS: H Yu; F Cheng; Li, Y; F Cheang; I Mak; Martins, RP;
PUBLISHED: 2012, SOURCE: ELECTRONICS LETTERS, VOLUME: 48, ISSUE: 24
AUTHORS: H Yu; F Cheng; Li, Y; F Cheang; I Mak; Martins, RP;
PUBLISHED: 2012, SOURCE: ELECTRONICS LETTERS, VOLUME: 48, ISSUE: 24
INDEXED IN:
WOS
CrossRef


184
TITLE: Enhanced RFICs in Nanoscale CMOS Full Text
AUTHORS: Pui In Mak; Rui P Martins;
PUBLISHED: 2012, SOURCE: IEEE MICROWAVE MAGAZINE, VOLUME: 13, ISSUE: 6
AUTHORS: Pui In Mak; Rui P Martins;
PUBLISHED: 2012, SOURCE: IEEE MICROWAVE MAGAZINE, VOLUME: 13, ISSUE: 6
185
TITLE: Ultra-area-efficient three-stage amplifier using current buffer Miller compensation and parallel compensation Full Text
AUTHORS: Yan, Z; I Mak; K Law; Martins, RP;
PUBLISHED: 2012, SOURCE: ELECTRONICS LETTERS, VOLUME: 48, ISSUE: 11
AUTHORS: Yan, Z; I Mak; K Law; Martins, RP;
PUBLISHED: 2012, SOURCE: ELECTRONICS LETTERS, VOLUME: 48, ISSUE: 11
186
TITLE: Double recycling technique for folded-cascode OTA Full Text
AUTHORS: Zushu S Yan; Pui In Mak; Martins, RP;
PUBLISHED: 2012, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 71, ISSUE: 1
AUTHORS: Zushu S Yan; Pui In Mak; Martins, RP;
PUBLISHED: 2012, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 71, ISSUE: 1
187
TITLE: An 8-b 400-ms/s 2-b-per-cycle sar adc with resistive dac
AUTHORS: Wei, H; Chan, CH; Chio, UF; Sin, SW; Seng Pan, U; Martins, RP; Maloberti, F;
PUBLISHED: 2012, SOURCE: IEEE Journal of Solid-State Circuits, VOLUME: 47, ISSUE: 11
AUTHORS: Wei, H; Chan, CH; Chio, UF; Sin, SW; Seng Pan, U; Martins, RP; Maloberti, F;
PUBLISHED: 2012, SOURCE: IEEE Journal of Solid-State Circuits, VOLUME: 47, ISSUE: 11
INDEXED IN:
Scopus
CrossRef


188
TITLE: A 12-bit 110MS/s 4-stage single-opamp pipelined SAR ADC with ratio-based GEC technique
AUTHORS: Wang, R; Chio, UF; Sin, SW; Seng Pan, U; Wang, Z; Martins, RP;
PUBLISHED: 2012, SOURCE: 38th European Solid State Circuits Conference, ESSCIRC 2012 in European Solid-State Circuits Conference
AUTHORS: Wang, R; Chio, UF; Sin, SW; Seng Pan, U; Wang, Z; Martins, RP;
PUBLISHED: 2012, SOURCE: 38th European Solid State Circuits Conference, ESSCIRC 2012 in European Solid-State Circuits Conference
INDEXED IN:
Scopus
CrossRef


189
TITLE: A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS
AUTHORS: Yin, G; Wei, HG; Chio, UF; Sin, SW; Seng Pan, U; Wang, Z; Martins, RP;
PUBLISHED: 2012, SOURCE: 38th European Solid State Circuits Conference, ESSCIRC 2012 in European Solid-State Circuits Conference
AUTHORS: Yin, G; Wei, HG; Chio, UF; Sin, SW; Seng Pan, U; Wang, Z; Martins, RP;
PUBLISHED: 2012, SOURCE: 38th European Solid State Circuits Conference, ESSCIRC 2012 in European Solid-State Circuits Conference
INDEXED IN:
Scopus
CrossRef


190
TITLE: A robust NTF zero optimization technique for both low and high OSRs sigma-delta modulators
AUTHORS: Du, Y; He, T; Jiang, Y; Sin, SW; U, SP; Martins, RP;
PUBLISHED: 2012, SOURCE: 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
AUTHORS: Du, Y; He, T; Jiang, Y; Sin, SW; U, SP; Martins, RP;
PUBLISHED: 2012, SOURCE: 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
INDEXED IN:
Scopus
CrossRef

