José Carlos Alves Pereira Monteiro
AuthID: R-000-85F
21
TITLE: Efficient Dedicated Multiplication Blocks for 2's Complement Radix-16 and Radix-256 Array Multipliers
AUTHORS: Leandro Zafalon Pieper; Eduardo A C da Costa; Sergio J M de Almeida; Sergio Bampi; Jose C Monteiro;
PUBLISHED: 2008, SOURCE: 2nd International Conference on Signals, Circuits and Systems in SCS: 2008 2ND INTERNATIONAL CONFERENCE ON SIGNALS, CIRCUITS AND SYSTEMS
AUTHORS: Leandro Zafalon Pieper; Eduardo A C da Costa; Sergio J M de Almeida; Sergio Bampi; Jose C Monteiro;
PUBLISHED: 2008, SOURCE: 2nd International Conference on Signals, Circuits and Systems in SCS: 2008 2ND INTERNATIONAL CONFERENCE ON SIGNALS, CIRCUITS AND SYSTEMS
INDEXED IN: 
WOS
WOS22
TITLE: A comparison of layout implementations of pipelined and non-pipelined signed radix-4 array multiplier and modified booth multiplier architectures
AUTHORS: Leonardo L de Oliveira; Cristiano Santos; Daniel Ferrao; Eduardo Costa; Jose Monteiro; Joao Baptista Martins; Sergio Bampi; Ricardo Reis;
PUBLISHED: 2007, SOURCE: 13th International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005) in VLSI-SOC: FROM SYSTEMS TO SILICON, VOLUME: 240
AUTHORS: Leonardo L de Oliveira; Cristiano Santos; Daniel Ferrao; Eduardo Costa; Jose Monteiro; Joao Baptista Martins; Sergio Bampi; Ricardo Reis;
PUBLISHED: 2007, SOURCE: 13th International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005) in VLSI-SOC: FROM SYSTEMS TO SILICON, VOLUME: 240
INDEXED IN: WOS
WOS23
TITLE: Gray encoded arithmetic operators applied to FFT and FIR dedicated datapaths
AUTHORS: Eduardo A C da Costa; Jose C Monteiro; Sergio Bampi;
PUBLISHED: 2006, SOURCE: 12th International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003) in VLSI-SOC: FROM SYSTEMS TO CHIPS, VOLUME: 200
AUTHORS: Eduardo A C da Costa; Jose C Monteiro; Sergio Bampi;
PUBLISHED: 2006, SOURCE: 12th International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003) in VLSI-SOC: FROM SYSTEMS TO CHIPS, VOLUME: 200
INDEXED IN: WOS
WOS24
TITLE: Computer-Aided Design Techniques for Low Power Sequential Logic Circuits
AUTHORS: José Monteiro; Srinivas Devadas;
PUBLISHED: 1997
AUTHORS: José Monteiro; Srinivas Devadas;
PUBLISHED: 1997
25
TITLE: Power estimation methods for sequential logic circuits Full Text
AUTHORS: Chi-Ying Tsui, ; Monteiro, J; Massoud Pedram, ; Srinivas Devadas, ; A.M Despain; Lin, B;
PUBLISHED: 1995, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems - IEEE Trans. VLSI Syst., VOLUME: 3, ISSUE: 3
AUTHORS: Chi-Ying Tsui, ; Monteiro, J; Massoud Pedram, ; Srinivas Devadas, ; A.M Despain; Lin, B;
PUBLISHED: 1995, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems - IEEE Trans. VLSI Syst., VOLUME: 3, ISSUE: 3
