José Carlos Alves Pereira Monteiro
AuthID: R-000-85F
21
TITLE: Analysis of short-circuit conditions in logic circuits
AUTHORS: Joao Afonso; Jose Monteiro;
PUBLISHED: 2017, SOURCE: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017
AUTHORS: Joao Afonso; Jose Monteiro;
PUBLISHED: 2017, SOURCE: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017
IN MY: 
ORCID | 
CIÊNCIAVITAE
ORCID | CIÊNCIAVITAE22
TITLE: A novel method for the approximation of multiplierless constant matrix vector multiplication
AUTHORS: Aksoy, L; Flores, P; Monteiro, J;
PUBLISHED: 2016, SOURCE: EURASIP JOURNAL ON EMBEDDED SYSTEMS, VOLUME: 2016, ISSUE: 1
AUTHORS: Aksoy, L; Flores, P; Monteiro, J;
PUBLISHED: 2016, SOURCE: EURASIP JOURNAL ON EMBEDDED SYSTEMS, VOLUME: 2016, ISSUE: 1
IN MY: CIÊNCIAVITAE
CIÊNCIAVITAE23
TITLE: Cryogenic Temperature Response of Reflection-Based Phase-Shifted Long-Period Fiber Gratings Full Text
AUTHORS: Raquel Martins; Paulo Caldas ; Bruno Teixeira; Joao Azevedo; Jose Monteiro; Joao H Belo ; Joao P Araujo ; Jose L Santos ; Gaspar Rego ;
PUBLISHED: 2015, SOURCE: JOURNAL OF LIGHTWAVE TECHNOLOGY, VOLUME: 33, ISSUE: 12
AUTHORS: Raquel Martins; Paulo Caldas ; Bruno Teixeira; Joao Azevedo; Jose Monteiro; Joao H Belo ; Joao P Araujo ; Jose L Santos ; Gaspar Rego ;
PUBLISHED: 2015, SOURCE: JOURNAL OF LIGHTWAVE TECHNOLOGY, VOLUME: 33, ISSUE: 12
24
TITLE: Quaternary logic lookup table in standard CMOS
AUTHORS: Brito, D; Rabuske, TG; Fernandes, JR; Flores, P; Monteiro, J;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 2
AUTHORS: Brito, D; Rabuske, TG; Fernandes, JR; Flores, P; Monteiro, J;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 2
INDEXED IN: 
Scopus
Scopus25
TITLE: Efficient Design of FIR Filters Using Hybrid Multiple Constant Multiplications on FPGA
AUTHORS: Levent Aksoy; Paulo Flores; Jose Monteiro;
PUBLISHED: 2014, SOURCE: 32nd IEEE International Conference on Computer Design (ICCD) in 2014 32ND IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD)
AUTHORS: Levent Aksoy; Paulo Flores; Jose Monteiro;
PUBLISHED: 2014, SOURCE: 32nd IEEE International Conference on Computer Design (ICCD) in 2014 32ND IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD)
INDEXED IN: 
WOS
WOS26
TITLE: Optimization of design complexity in time-multiplexed constant multiplications
AUTHORS: Levent Aksoy; Paulo Flores; Jose Monteiro;
PUBLISHED: 2014, SOURCE: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014
AUTHORS: Levent Aksoy; Paulo Flores; Jose Monteiro;
PUBLISHED: 2014, SOURCE: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014
INDEXED IN: 
CrossRef
CrossRef IN MY: ORCID | CIÊNCIAVITAE
ORCID | CIÊNCIAVITAE27
TITLE: Exploration of tradeoffs in the design of integer cosine transforms for image compression
AUTHORS: Aksoy, L; Costa, E; Flores, P; Monteiro, J;
PUBLISHED: 2013, SOURCE: 2013 European Conference on Circuit Theory and Design, ECCTD 2013 in 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
AUTHORS: Aksoy, L; Costa, E; Flores, P; Monteiro, J;
PUBLISHED: 2013, SOURCE: 2013 European Conference on Circuit Theory and Design, ECCTD 2013 in 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
IN MY: ORCID | CIÊNCIAVITAE
ORCID | CIÊNCIAVITAE28
TITLE: SIREN. a depth-first search algorithm for the filter design optimization problem
AUTHORS: Levent Aksoy; Paulo Flores; José Monteiro;
PUBLISHED: 2013, SOURCE: Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI - GLSVLSI '13
AUTHORS: Levent Aksoy; Paulo Flores; José Monteiro;
PUBLISHED: 2013, SOURCE: Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI - GLSVLSI '13
INDEXED IN: CrossRef
CrossRef IN MY: ORCID | CIÊNCIAVITAE
ORCID | CIÊNCIAVITAE29
TITLE: Combination of radix-2<sup>m</sup> multiplier blocks and adder compressors for the design of efficient 2's complement 64-bit array multipliers
AUTHORS: Leandro Zafalon Pieper; Eduardo A C da Costa; Jose C Monteiro;
PUBLISHED: 2013, SOURCE: 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)
AUTHORS: Leandro Zafalon Pieper; Eduardo A C da Costa; Jose C Monteiro;
PUBLISHED: 2013, SOURCE: 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)
IN MY: ORCID | CIÊNCIAVITAE
ORCID | CIÊNCIAVITAE30
TITLE: Design and Characterization of a QLUT in a Standard CMOS Process
AUTHORS: Diogo Brito; Jorge Fernandes; Paulo Flores; Jose Monteiro;
PUBLISHED: 2012, SOURCE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
AUTHORS: Diogo Brito; Jorge Fernandes; Paulo Flores; Jose Monteiro;
PUBLISHED: 2012, SOURCE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
INDEXED IN: WOS
WOS