Leonel Augusto Pires Seabra Sousa
AuthID: R-000-93B
121
TITLE: Multiobjective Frog-Leaping Optimization for the Study of Ancestral Relationships in Protein Data
AUTHORS: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Leonel Sousa;
PUBLISHED: 2018, SOURCE: IEEE Trans. Evolutionary Computation, VOLUME: 22, ISSUE: 6
AUTHORS: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Leonel Sousa;
PUBLISHED: 2018, SOURCE: IEEE Trans. Evolutionary Computation, VOLUME: 22, ISSUE: 6
INDEXED IN: 
DBLP
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DBLP122
TITLE: Phylogenetic Reconstructions Using an Indicator-Based Bat Algorithm for Multicore Processors
AUTHORS: Sergio Santander Jimenez; Miguel A Vega Rodriguez; Leonel Sousa;
PUBLISHED: 2018, SOURCE: IEEE International Conference on Bioinformatics and Biomedicine (BIBM) in PROCEEDINGS 2018 IEEE INTERNATIONAL CONFERENCE ON BIOINFORMATICS AND BIOMEDICINE (BIBM)
AUTHORS: Sergio Santander Jimenez; Miguel A Vega Rodriguez; Leonel Sousa;
PUBLISHED: 2018, SOURCE: IEEE International Conference on Bioinformatics and Biomedicine (BIBM) in PROCEEDINGS 2018 IEEE INTERNATIONAL CONFERENCE ON BIOINFORMATICS AND BIOMEDICINE (BIBM)
INDEXED IN: 
WOS
WOS123
TITLE: Accelerating CNN computation: quantisation tuning and network resizing
AUTHORS: Alexandre Vieira; Frederico Pratas; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2018, SOURCE: Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, ANDARE@PACT 2018, Limassol, Cyprus, November 4, 2018
AUTHORS: Alexandre Vieira; Frederico Pratas; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2018, SOURCE: Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, ANDARE@PACT 2018, Limassol, Cyprus, November 4, 2018
INDEXED IN: DBLP
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DBLP124
TITLE: Cache-Aware Roofline Model and Medical Image Processing Optimizations in GPUs
AUTHORS: Estefania Serrano; Aleksandar Ilic; Leonel Sousa; Javier García Blas; Jesús Carretero;
PUBLISHED: 2018, SOURCE: High Performance Computing - ISC High Performance 2018 International Workshops, Frankfurt/Main, Germany, June 28, 2018, Revised Selected Papers, VOLUME: 11203
AUTHORS: Estefania Serrano; Aleksandar Ilic; Leonel Sousa; Javier García Blas; Jesús Carretero;
PUBLISHED: 2018, SOURCE: High Performance Computing - ISC High Performance 2018 International Workshops, Frankfurt/Main, Germany, June 28, 2018, Revised Selected Papers, VOLUME: 11203
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP125
TITLE: Cache-aware Roofline Model in Intel® Advisor
AUTHORS: Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2017, SOURCE: ERCIM News, VOLUME: 2017, ISSUE: 110
AUTHORS: Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2017, SOURCE: ERCIM News, VOLUME: 2017, ISSUE: 110
INDEXED IN: DBLP
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DBLP126
TITLE: Efficient reductions in cyclotomic rings - Application to R-LWE based FHE schemes
AUTHORS: Jean Claude Bajard; Julien Eynard; Anwar Hasan; Paulo Martins; Leonel Sousa; Vincent Zucca;
PUBLISHED: 2017, SOURCE: IACR Cryptology ePrint Archive, VOLUME: 2017
AUTHORS: Jean Claude Bajard; Julien Eynard; Anwar Hasan; Paulo Martins; Leonel Sousa; Vincent Zucca;
PUBLISHED: 2017, SOURCE: IACR Cryptology ePrint Archive, VOLUME: 2017
INDEXED IN: DBLP
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DBLP127
TITLE: A Reduced-Bias Approach With a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo 2n + 1 Multiplier
AUTHORS: Seyed Mostafa Mirhosseini; Amir Sabbagh Molahosseini; Mehdi Hosseinzadeh; Leonel Sousa; Paulo Martins;
PUBLISHED: 2017, SOURCE: IEEE Trans. on Circuits and Systems, VOLUME: 64, ISSUE: 7
AUTHORS: Seyed Mostafa Mirhosseini; Amir Sabbagh Molahosseini; Mehdi Hosseinzadeh; Leonel Sousa; Paulo Martins;
PUBLISHED: 2017, SOURCE: IEEE Trans. on Circuits and Systems, VOLUME: 64, ISSUE: 7
INDEXED IN: DBLP
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DBLP128
TITLE: Performance Analysis with Cache-Aware Roofline Model in Intel Advisor
AUTHORS: Diogo Marques; Helder Duarte; Aleksandar Ilic; Leonel Sousa; Roman Belenov; Philippe Thierry; Zakhar A Matveev;
PUBLISHED: 2017, SOURCE: 2017 International Conference on High Performance Computing & Simulation, HPCS 2017, Genoa, Italy, July 17-21, 2017
AUTHORS: Diogo Marques; Helder Duarte; Aleksandar Ilic; Leonel Sousa; Roman Belenov; Philippe Thierry; Zakhar A Matveev;
PUBLISHED: 2017, SOURCE: 2017 International Conference on High Performance Computing & Simulation, HPCS 2017, Genoa, Italy, July 17-21, 2017
INDEXED IN: DBLP
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DBLP129
TITLE: Analyzing Performance of Multi-cores and Applications with Cache-aware Roofline Model
AUTHORS: Diogo Marques; Helder Duarte; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2017, SOURCE: 2017 International Conference on High Performance Computing & Simulation, HPCS 2017, Genoa, Italy, July 17-21, 2017
AUTHORS: Diogo Marques; Helder Duarte; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2017, SOURCE: 2017 International Conference on High Performance Computing & Simulation, HPCS 2017, Genoa, Italy, July 17-21, 2017
INDEXED IN: DBLP
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DBLP130
TITLE: Energy-efficient motion estimation with approximate arithmetic
AUTHORS: Roger Endrigo Carvalho Porto; Luciano Volcan Agostini; Bruno Zatt; Marcelo Schiavon Porto; Nuno Roma; Leonel Sousa;
PUBLISHED: 2017, SOURCE: 19th IEEE International Workshop on Multimedia Signal Processing, MMSP 2017, Luton, United Kingdom, October 16-18, 2017
AUTHORS: Roger Endrigo Carvalho Porto; Luciano Volcan Agostini; Bruno Zatt; Marcelo Schiavon Porto; Nuno Roma; Leonel Sousa;
PUBLISHED: 2017, SOURCE: 19th IEEE International Workshop on Multimedia Signal Processing, MMSP 2017, Luton, United Kingdom, October 16-18, 2017
INDEXED IN: DBLP
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DBLP