Leonel Augusto Pires Seabra Sousa
AuthID: R-000-93B
182
TITLE: GHEVC: An Efficient HEVC Decoder for Graphics Processing Units Full Text
AUTHORS: Diego F de Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON MULTIMEDIA, VOLUME: 19, ISSUE: 3
AUTHORS: Diego F de Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON MULTIMEDIA, VOLUME: 19, ISSUE: 3
184
TITLE: TrustZone-backed bitcoin wallet
AUTHORS: Miraje Gentilal; Paulo Martins; Leonel Sousa;
PUBLISHED: 2017, SOURCE: 4th Workshop on Cryptography and Security in Computing Systems, CS2 2017 in Proceedings of the Fourth Workshop on Cryptography and Security in Computing Systems, CS2@HiPEAC 2017, Stockholm, Sweden, January 24, 2017, VOLUME: Part F126333
AUTHORS: Miraje Gentilal; Paulo Martins; Leonel Sousa;
PUBLISHED: 2017, SOURCE: 4th Workshop on Cryptography and Security in Computing Systems, CS2 2017 in Proceedings of the Fourth Workshop on Cryptography and Security in Computing Systems, CS2@HiPEAC 2017, Stockholm, Sweden, January 24, 2017, VOLUME: Part F126333
186
TITLE: Accelerating the phylogenetic parsimony function on heterogeneous systems
AUTHORS: Sergio Santander Jiménez; Aleksandar Ilic; Leonel Sousa; Miguel A Vega Rodríguez;
PUBLISHED: 2017, SOURCE: Concurrency and Computation: Practice and Experience, VOLUME: 29, ISSUE: 8
AUTHORS: Sergio Santander Jiménez; Aleksandar Ilic; Leonel Sousa; Miguel A Vega Rodríguez;
PUBLISHED: 2017, SOURCE: Concurrency and Computation: Practice and Experience, VOLUME: 29, ISSUE: 8
187
TITLE: On Boosting Energy-Efficiency of Heterogeneous Embedded Systems via Game Theory
AUTHORS: David Pereira; Aleksandar Ilic; Leonel Sousa;
PUBLISHED: 2017, SOURCE: 8th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 6th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms, PARMA-DITAM 2017 in Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM@HiPEAC 2017, Stockholm, Sweden, January 25, 2017, VOLUME: Part F126743
AUTHORS: David Pereira; Aleksandar Ilic; Leonel Sousa;
PUBLISHED: 2017, SOURCE: 8th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 6th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms, PARMA-DITAM 2017 in Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM@HiPEAC 2017, Stockholm, Sweden, January 25, 2017, VOLUME: Part F126743
189
TITLE: Parallel Programming Framework for H.264/AVC Video Encoding in Multicore Systems
AUTHORS: Roma, N; Rodrigues, A; Sousa, L;
PUBLISHED: 2017, SOURCE: Programming Multicore and Many-Core Computing Systems
AUTHORS: Roma, N; Rodrigues, A; Sousa, L;
PUBLISHED: 2017, SOURCE: Programming Multicore and Many-Core Computing Systems
190
TITLE: A Reduced-Bias Approach With a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo 2<i><SUP>n</SUP></i>+1 Multiplier
AUTHORS: Mirhosseini, SM; Molahosseini, AS; Hosseinzadeh, M; Sousa, L; Martins, P;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, VOLUME: 64, ISSUE: 7
AUTHORS: Mirhosseini, SM; Molahosseini, AS; Hosseinzadeh, M; Sousa, L; Martins, P;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, VOLUME: 64, ISSUE: 7
