Leonel Augusto Pires Seabra Sousa
AuthID: R-000-93B
221
TITLE: Arithmetic-based binary-to-RNS converter modulo {2n±k} for -bit dynamic range
AUTHORS: Matutino, PM; Chaves, R; Sousa, L;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
AUTHORS: Matutino, PM; Chaves, R; Sousa, L;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
INDEXED IN: 
Scopus
Scopus IN MY: 
ORCID
ORCID222
TITLE: Reverse converter design via parallel-prefix adders: Novel components, methodology, and implementations
AUTHORS: Zarandi, AAE; Molahosseini, AS; Hosseinzadeh, M; Sorouri, S; Antao, S; Sousa, L;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 2
AUTHORS: Zarandi, AAE; Molahosseini, AS; Hosseinzadeh, M; Sorouri, S; Antao, S; Sousa, L;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 2
INDEXED IN: Scopus
Scopus IN MY: ORCID
ORCID223
TITLE: Base Transformation With Injective Residue Mapping for Dynamic Range Reduction in RNS
AUTHORS: Thian Fatt Tay; Chip Hong Chang; Leonel Sousa;
PUBLISHED: 2015, SOURCE: IEEE Trans. on Circuits and Systems, VOLUME: 62-I, ISSUE: 9
AUTHORS: Thian Fatt Tay; Chip Hong Chang; Leonel Sousa;
PUBLISHED: 2015, SOURCE: IEEE Trans. on Circuits and Systems, VOLUME: 62-I, ISSUE: 9
INDEXED IN: 
DBLP
DBLP IN MY: DBLP
DBLP
225
TITLE: RECONFIGURABLE DATA FLOW ENGINE FOR HEVC MOTION ESTIMATION
AUTHORS: Thomas D'huys; Svetislav Momcilovic; Frederico Pratas; Leonel Sousa;
PUBLISHED: 2014, SOURCE: IEEE International Conference on Image Processing (ICIP) in 2014 IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING (ICIP)
AUTHORS: Thomas D'huys; Svetislav Momcilovic; Frederico Pratas; Leonel Sousa;
PUBLISHED: 2014, SOURCE: IEEE International Conference on Image Processing (ICIP) in 2014 IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING (ICIP)
INDEXED IN: 
WOS
WOS226
TITLE: ROM-less RNS-to-binary converter moduli {2(2n)-1, 2(2n)+1, 2(n)-3, 2(n)+3}
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa;
PUBLISHED: 2014, SOURCE: 14 International Symposium on Integrated Circuits (ISIC) in 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC)
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa;
PUBLISHED: 2014, SOURCE: 14 International Symposium on Integrated Circuits (ISIC) in 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC)
INDEXED IN: WOS
WOS227
TITLE: NONLINEAR SYSTEM IDENTIFICATION USING CONSTELLATION BASED MULTIPLE MODEL ADAPTIVE ESTIMATORS
AUTHORS: Joao C Martins; Jose Jasnau Caeiro; Leonel A Sousa;
PUBLISHED: 2014, SOURCE: 22nd European Signal Processing Conference (EUSIPCO) in 2014 PROCEEDINGS OF THE 22ND EUROPEAN SIGNAL PROCESSING CONFERENCE (EUSIPCO)
AUTHORS: Joao C Martins; Jose Jasnau Caeiro; Leonel A Sousa;
PUBLISHED: 2014, SOURCE: 22nd European Signal Processing Conference (EUSIPCO) in 2014 PROCEEDINGS OF THE 22ND EUROPEAN SIGNAL PROCESSING CONFERENCE (EUSIPCO)
INDEXED IN: WOS
WOS228
TITLE: Collaborative inter-prediction on CPU+GPU systems
AUTHORS: Momcilovic, S; Ilic, A; Roma, N; Sousa, L;
PUBLISHED: 2014, SOURCE: 2014 IEEE International Conference on Image Processing, ICIP 2014 in 2014 IEEE International Conference on Image Processing, ICIP 2014
AUTHORS: Momcilovic, S; Ilic, A; Roma, N; Sousa, L;
PUBLISHED: 2014, SOURCE: 2014 IEEE International Conference on Image Processing, ICIP 2014 in 2014 IEEE International Conference on Image Processing, ICIP 2014
INDEXED IN: Scopus
Scopus229
TITLE: Finite-Difference in Time-Domain Scalable Implementations on CUDA and OpenCL
AUTHORS: Lidia Kuan; Pedro Tomás; Leonel Sousa;
PUBLISHED: 2014, SOURCE: Numerical Computations with GPUs
AUTHORS: Lidia Kuan; Pedro Tomás; Leonel Sousa;
PUBLISHED: 2014, SOURCE: Numerical Computations with GPUs
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP230
TITLE: DARNS: A Randomized Multi-modulo RNS Architecture for Double-and-Add in ECC to prevent Power Analysis Side Channel Attacks
AUTHORS: Jude Angelo Ambrose; Hector Pettenghi; Leonel Sousa;
PUBLISHED: 2013, SOURCE: 18th Asia and South Pacific Design Automation Conference (ASP-DAC) in 2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)
AUTHORS: Jude Angelo Ambrose; Hector Pettenghi; Leonel Sousa;
PUBLISHED: 2013, SOURCE: 18th Asia and South Pacific Design Automation Conference (ASP-DAC) in 2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)
INDEXED IN: WOS
WOS