Leonel Augusto Pires Seabra Sousa
AuthID: R-000-93B
81
TITLE: An asymptotically faster version of FV supported on HPR
AUTHORS: Jean Claude Bajard; Julien Eynard; Paulo Martins; Leonel Sousa; Vincent Zucca;
PUBLISHED: 2020, SOURCE: 27th IEEE Symposium on Computer Arithmetic, ARITH 2020, Portland, OR, USA, June 7-10, 2020
AUTHORS: Jean Claude Bajard; Julien Eynard; Paulo Martins; Leonel Sousa; Vincent Zucca;
PUBLISHED: 2020, SOURCE: 27th IEEE Symposium on Computer Arithmetic, ARITH 2020, Portland, OR, USA, June 7-10, 2020
INDEXED IN: 
DBLP
DBLP IN MY: DBLP
DBLP82
TITLE: Heterogeneous CPU+iGPU Processing for Efficient Epistasis Detection
AUTHORS: Rafael Campos; Diogo Marques; Sergio Santander Jiménez; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: Euro-Par 2020: Parallel Processing - 26th International Conference on Parallel and Distributed Computing, Warsaw, Poland, August 24-28, 2020, Proceedings, VOLUME: 12247
AUTHORS: Rafael Campos; Diogo Marques; Sergio Santander Jiménez; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: Euro-Par 2020: Parallel Processing - 26th International Conference on Parallel and Distributed Computing, Warsaw, Poland, August 24-28, 2020, Proceedings, VOLUME: 12247
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP83
TITLE: 30th International Conference on Field-Programmable Logic and Applications, FPL 2020, Gothenburg, Sweden, August 31 - September 4, 2020
AUTHORS: Nele Mentens; Leonel Sousa; Pedro Trancoso; Miquel Pericàs; Ioannis Sourdis;
PUBLISHED: 2020, SOURCE: FPL
AUTHORS: Nele Mentens; Leonel Sousa; Pedro Trancoso; Miquel Pericàs; Ioannis Sourdis;
PUBLISHED: 2020, SOURCE: FPL
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP84
TITLE: GPU acceleration of Fitch's parsimony on protein data: from Kepler to Turing
AUTHORS: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Antonio Zahinos Márquez; Leonel Sousa;
PUBLISHED: 2020, SOURCE: J. Supercomput., VOLUME: 76, ISSUE: 12
AUTHORS: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Antonio Zahinos Márquez; Leonel Sousa;
PUBLISHED: 2020, SOURCE: J. Supercomput., VOLUME: 76, ISSUE: 12
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP85
TITLE: Accelerating 3-Way Epistasis Detection with CPU+GPU Processing
AUTHORS: Ricardo Nobre; Sergio Santander Jiménez; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: Job Scheduling Strategies for Parallel Processing - 23rd International Workshop, JSSPP 2020, New Orleans, LA, USA, May 22, 2020, Revised Selected Papers, VOLUME: 12326
AUTHORS: Ricardo Nobre; Sergio Santander Jiménez; Leonel Sousa; Aleksandar Ilic;
PUBLISHED: 2020, SOURCE: Job Scheduling Strategies for Parallel Processing - 23rd International Workshop, JSSPP 2020, New Orleans, LA, USA, May 22, 2020, Revised Selected Papers, VOLUME: 12326
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP86
TITLE: Raising the Abstraction Level of a Deep Learning Design on FPGAs
AUTHORS: Darío Baptista; Leonel Sousa; Fernando Morgado Dias;
PUBLISHED: 2020, SOURCE: IEEE Access, VOLUME: 8
AUTHORS: Darío Baptista; Leonel Sousa; Fernando Morgado Dias;
PUBLISHED: 2020, SOURCE: IEEE Access, VOLUME: 8
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP87
TITLE: Environmental governance theories: a review and application to coastal systems Full Text
AUTHORS: Partelow, S; Schluter, A; Armitage, D; Bavinck, M; Carlisle, K; Gruby, RL; Hornidge, AK; Le Tissier, M; Pittman, JB; Song, AM; Sousa, LP; Vaidianu, N; Van Assche, K;
PUBLISHED: 2020, SOURCE: ECOLOGY AND SOCIETY, VOLUME: 25, ISSUE: 4
AUTHORS: Partelow, S; Schluter, A; Armitage, D; Bavinck, M; Carlisle, K; Gruby, RL; Hornidge, AK; Le Tissier, M; Pittman, JB; Song, AM; Sousa, LP; Vaidianu, N; Van Assche, K;
PUBLISHED: 2020, SOURCE: ECOLOGY AND SOCIETY, VOLUME: 25, ISSUE: 4
INDEXED IN: 
Scopus 
WOS
Scopus WOS88
TITLE: Improving the Efficiency of SVM Classification With FHE
AUTHORS: Jean Claude Bajard; Paulo Martins; Leonel Sousa; Vincent Zucca;
PUBLISHED: 2020, SOURCE: IEEE Trans. Inf. Forensics Secur., VOLUME: 15
AUTHORS: Jean Claude Bajard; Paulo Martins; Leonel Sousa; Vincent Zucca;
PUBLISHED: 2020, SOURCE: IEEE Trans. Inf. Forensics Secur., VOLUME: 15
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP89
TITLE: On the Design of RNS Inter-Modulo Processing Units for the Arithmetic-Friendly Moduli Sets {2n+k, 2n - 1, 2n+1 - 1}
AUTHORS: Ahmad Hiasat; Leonel Sousa;
PUBLISHED: 2019, SOURCE: Comput. J., VOLUME: 62, ISSUE: 2
AUTHORS: Ahmad Hiasat; Leonel Sousa;
PUBLISHED: 2019, SOURCE: Comput. J., VOLUME: 62, ISSUE: 2
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP90
TITLE: Comparative assessment of GPGPU technologies to accelerate objective functions: A case study on parsimony
AUTHORS: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Jorge Vicente Viola; Leonel Sousa;
PUBLISHED: 2019, SOURCE: J. Parallel Distrib. Comput., VOLUME: 126
AUTHORS: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Jorge Vicente Viola; Leonel Sousa;
PUBLISHED: 2019, SOURCE: J. Parallel Distrib. Comput., VOLUME: 126
INDEXED IN: DBLP
DBLP IN MY: DBLP
DBLP