Computing Systems Research Lab

Publications Actions
Publications at Authenticus Institutional Profile

An Authenticus institution (group) is an organization which consists of a set of researchers (institutional/group team). The set of researchers depends on the organizational structure of the institution per year and can be set at the institution profile, under ‘Researchers’ interface. Based on the institutional team we produce listings of publications, statistics and institutional reports. 

Publications displayed at an Authenticus institutional profile depend on two parameters:

  • Researchers team associated with the institution per year. 
  • Publications source type. 

We define 3 types of publication sources:

  • Validated by team members - includes all publications validated by team members. Requires the definition of the institutional team. 
  • All published by team members - includes all publications validated by the institution team members plus all not-validated (only identified) publications. Requires the definition of the institutional team. 
  • Affiliation Based - includes publications that have the institution/group in the publication affiliation. Does not require institutional team, but at the same time does not guarantee that all publications will be listed. 
External   Internal

Update Citation

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Rules:
 This actions updates publications citations of every team member.
 Only validated by team members publications are included.
 Only the current year team is included in this action.>
 The action is executed in the background, thus the results are NOT immediate.
 This actions can be executed only once a month!

Update PrePrints

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Rules:
 This actions updates all pre print publications of the group/institution.
 Only validated by current year team members publications are included.
 The action is executed in the background, thus the results are NOT immediate.
 This actions can be executed only once a day!

Publications Count: 662

9 Team Members
Filters -> Year: 2025
501
TITLE: A List Scheduling Algorithm for Scheduling Multi-user Jobs on Clusters  Full Text
AUTHORS: Barbosa, J ; Monteiro, AP ;
PUBLISHED: 2008, SOURCE: 8th International Conference on High Performance Computing for Computational Science (VECPAR 2008) in HIGH PERFORMANCE COMPUTING FOR COMPUTATIONAL SCIENCE - VECPAR 2008, VOLUME: 5336, PAGES: 123-136
INDEXED IN: Scopus WOS DBLP CrossRef: 4
502
TITLE: A teaching strategy for developing application specific architectures for FPGAs
AUTHORS: Joao M P Cardoso ;
PUBLISHED: 2008, SOURCE: INTERNATIONAL JOURNAL OF ENGINEERING EDUCATION, VOLUME: 24, ISSUE: 4, PAGES: 833-842
INDEXED IN: Scopus WOS
503
TITLE: Automatic Extraction of Process Control Flow from I/O Operations
AUTHORS: Pedro C Diniz ; Diogo R Ferreira;
PUBLISHED: 2008, SOURCE: 6th International Conference on Business Process Management in BUSINESS PROCESS MANAGEMENT, VOLUME: 5240, PAGES: 342-357
INDEXED IN: Scopus WOS
504
TITLE: Calibration of Bi-planar Radiography with a Rangefinder and a Small Calibration Object
AUTHORS: Daniel C Moura; Jorge G Barbosa ; João Manuel R. S. Tavares ; Ana M Reis;
PUBLISHED: 2008, SOURCE: 4th International Symposium on Visual Computing in ADVANCES IN VISUAL COMPUTING, PT I, PROCEEDINGS, VOLUME: 5358, ISSUE: PART 1, PAGES: 572-581
INDEXED IN: Scopus WOS DBLP CrossRef: 1
505
TITLE: Code Transformations  Full Text
AUTHORS: João M P Cardoso ; Pedro C Diniz;
PUBLISHED: 2008, SOURCE: Compilation Techniques for Reconfigurable Architectures, PAGES: 67-107
INDEXED IN: CrossRef
506
TITLE: Combining Rewriting-Logic, Architecture Generation, and Simulation to Exploit Coarse-Grained Reconfigurable Architectures
AUTHORS: Morra, C; Bispo, J ; Cardoso, JMP ; Becker, J;
PUBLISHED: 2008, SOURCE: 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines in PROCEEDINGS OF THE SIXTEENTH IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PAGES: 320-321
INDEXED IN: Scopus WOS DBLP CrossRef: 2 Handle
507
TITLE: Compilation and Synthesis Flows  Full Text
AUTHORS: João M P Cardoso ; Pedro C Diniz;
PUBLISHED: 2008, SOURCE: Compilation Techniques for Reconfigurable Architectures, PAGES: 33-65
INDEXED IN: CrossRef
508
TITLE: Compilers for Reconfigurable Architectures  Full Text
AUTHORS: João M P Cardoso ; Pedro C Diniz;
PUBLISHED: 2008, SOURCE: Compilation Techniques for Reconfigurable Architectures, PAGES: 155-176
INDEXED IN: CrossRef
509
TITLE: Final Remarks  Full Text
AUTHORS: João M P Cardoso ; Pedro C Diniz;
PUBLISHED: 2008, SOURCE: Compilation Techniques for Reconfigurable Architectures, PAGES: 191-192
INDEXED IN: CrossRef
510
TITLE: IJE special issue on reconfigurable hardware systems  Full Text
AUTHORS: Joao M P Cardoso ; Pedro C Diniz ;
PUBLISHED: 2008, SOURCE: INTERNATIONAL JOURNAL OF ELECTRONICS, VOLUME: 95, ISSUE: 7, PAGES: 601-602
INDEXED IN: Scopus WOS CrossRef
511
TITLE: Interval Tree Clocks A Logical Clock for Dynamic Systems
AUTHORS: Almeida, PS ; Baquero, C ; Fonte, V ;
PUBLISHED: 2008, SOURCE: 12th International Conference on Principles of Distributed Systems in PRINCIPLES OF DISTRIBUTED SYSTEMS, 12TH INTERNATIONAL CONFERENCE, OPODIS 2008, VOLUME: 5401, PAGES: 259-274
INDEXED IN: Scopus WOS DBLP CrossRef: 27 Handle
512
TITLE: Introduction  Full Text
AUTHORS: João M P Cardoso ; Pedro C Diniz;
PUBLISHED: 2008, SOURCE: Compilation Techniques for Reconfigurable Architectures, PAGES: 1-6
INDEXED IN: CrossRef: 1
513
TITLE: Lecture Notes in Computer Science: Preface
AUTHORS: Woods, R; Compton, K; Bouganis, C; Diniz, PC ;
PUBLISHED: 2008, SOURCE: 4th International Workshop on Applied Reconfigurable Computing, ARC 2008 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 4943 LNCS
INDEXED IN: Scopus
514
TITLE: Mapping and Execution Optimizations  Full Text
AUTHORS: João M P Cardoso ; Pedro C Diniz;
PUBLISHED: 2008, SOURCE: Compilation Techniques for Reconfigurable Architectures, PAGES: 109-154
INDEXED IN: CrossRef
515
TITLE: Overview of Reconfigurable Architectures  Full Text
AUTHORS: João M P Cardoso ; Pedro C Diniz;
PUBLISHED: 2008, SOURCE: Compilation Techniques for Reconfigurable Architectures, PAGES: 7-32
INDEXED IN: CrossRef
516
TITLE: Partial data reuse for nested loop computations: design space exploration for FPGA implementations  Full Text
AUTHORS: Joonseok Park; Pedro C Diniz ;
PUBLISHED: 2008, SOURCE: INTERNATIONAL JOURNAL OF ELECTRONICS, VOLUME: 95, ISSUE: 7, PAGES: 705-723
INDEXED IN: Scopus WOS CrossRef
517
TITLE: Perspectives on Programming Reconfigurable Computing Platforms  Full Text
AUTHORS: João M P Cardoso ; Pedro C Diniz;
PUBLISHED: 2008, SOURCE: Compilation Techniques for Reconfigurable Architectures, PAGES: 177-189
INDEXED IN: CrossRef
518
TITLE: Regular expression matching in reconfigurable hardware  Full Text
AUTHORS: Ioannis Sourdis; Stamatis Vassiliadis; Joao Bispo ; Joao M P Cardoso ;
PUBLISHED: 2008, SOURCE: 5th IEEE International Conference on Field Programmable Technology in JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 51, ISSUE: 1, PAGES: 99-121
INDEXED IN: Scopus WOS DBLP CrossRef: 60
519
TITLE: Retargeting, evaluating, and generating reconfigurable array-based architectures
AUTHORS: Morra, C; Cardoso, JMP ; Bispo, J ; Becker, J;
PUBLISHED: 2008, SOURCE: 2008 Symposium on Application Specific Processors in 2008 SYMPOSIUM ON APPLICATION SPECIFIC PROCESSORS, PAGES: 34-41
INDEXED IN: Scopus WOS DBLP CrossRef: 1 Handle
520
TITLE: Sorting units for FPGA-based embedded systems  Full Text
AUTHORS: Rui Marcelino; Horacio Neto ; Joao M P Cardoso ;
PUBLISHED: 2008, SOURCE: 20th World Computer Congress in DISTRIBUTED EMBEDDED SYSTEMS: DESIGN, MIDDLEWARE AND RESOURCES, VOLUME: 271, PAGES: 11-22
INDEXED IN: Scopus WOS DBLP CrossRef: 29

Results per Page: 20.
Page 26 of 34. Total results: 662.