101
TITLE: Parameterizable hardware architectures for automatic synthesis of motion estimation processors
AUTHORS: Roma, N ; Sousa, L ;
PUBLISHED: 2001, SOURCE: IEEE Workshop on Signal Processing, Systems Design and Implementation (SiPS 01) in SIPS 2001: IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION
INDEXED IN: Scopus WOS
IN MY: ORCID
102
TITLE: In the development and evaluation of specialized processors for computing high-order 2-D image moments in real-time
AUTHORS: Roma, N ; Sousa, L ;
PUBLISHED: 2000, SOURCE: 5th IEEE International Workshop on Computer Architectures for Machine Perception (CAMP 2000) in 5TH INTERNATIONAL WORKSHOP ON COMPUTER ARCHITECTURES FOR MACHINE PERCEPTION, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID
103
TITLE: Low-power array architectures for motion estimation
AUTHORS: Leonel Sousa ; Nuno Roma ;
PUBLISHED: 1999, SOURCE: Third IEEE Workshop on Multimedia Signal Processing, MMSP 1999, Copenhagen, Denmark, September 13-15, 1999
INDEXED IN: DBLP CrossRef
IN MY: ORCID
Page 11 of 11. Total results: 103.