Nuno Filipe Valentim Roma
AuthID: R-000-DNS
1
TITLE: Advancing the RISC-V Performance Simulation Ecosystem with Data Prefetching
AUTHORS: Luís Crespo; Nuno Neves; Pedro Tomas; Nuno Roma;
PUBLISHED: 2026, SOURCE: 40th International Conference on High Performance Computing, ISC High Performance 2025 in Lecture Notes in Computer Science, VOLUME: 16091 LNCS
AUTHORS: Luís Crespo; Nuno Neves; Pedro Tomas; Nuno Roma;
PUBLISHED: 2026, SOURCE: 40th International Conference on High Performance Computing, ISC High Performance 2025 in Lecture Notes in Computer Science, VOLUME: 16091 LNCS
2
TITLE: RISC-V in HPC: a Look Into Tools for Performance Monitoring
AUTHORS: Fabio Banchelli; Rafel Albert Bros Esqueu; Tiago Rocha; Nuno Roma; Pedro Tomas; Nuno Neves; Filippo Mantovani;
PUBLISHED: 2026, SOURCE: 40th International Conference on High Performance Computing, ISC High Performance 2025 in Lecture Notes in Computer Science, VOLUME: 16091 LNCS
AUTHORS: Fabio Banchelli; Rafel Albert Bros Esqueu; Tiago Rocha; Nuno Roma; Pedro Tomas; Nuno Neves; Filippo Mantovani;
PUBLISHED: 2026, SOURCE: 40th International Conference on High Performance Computing, ISC High Performance 2025 in Lecture Notes in Computer Science, VOLUME: 16091 LNCS
3
TITLE: Reconfigurable FPU With Precision Auto-Tuning for Next-Generation Transprecision Computing
AUTHORS: Dias, Guilherme; Crespo, Luis; Schlachter, Timo; Heller, Marc Andre; Krueger, Jens; Tomas, Pedro; Roma, Nuno; Neves, Nuno;
PUBLISHED: 2026, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
AUTHORS: Dias, Guilherme; Crespo, Luis; Schlachter, Timo; Heller, Marc Andre; Krueger, Jens; Tomas, Pedro; Roma, Nuno; Neves, Nuno;
PUBLISHED: 2026, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
4
TITLE: Improving Coding Efficiency of Massive Parallel Intra Prediction Using Alternative References
AUTHORS: Storch, Iago; Roma, Nuno; Palomino, Daniel; Bampi, Sergio;
PUBLISHED: 2025, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
AUTHORS: Storch, Iago; Roma, Nuno; Palomino, Daniel; Bampi, Sergio;
PUBLISHED: 2025, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
5
TITLE: Dynamic Reconfigurable FPU for Next-Generation Transprecision Computing
AUTHORS: Dias, Guilherme; Crespo, Luis; Tomas, Pedro ; Roma, Nuno; Neves, Nuno;
PUBLISHED: 2025, SOURCE: 16th Latin America Symposium on Circuits and System-LASCAS-Annual in 2025 IEEE 16TH LATIN AMERICA SYMPOSIUM ON CIRCUITS AND SYSTEMS, LASCAS
AUTHORS: Dias, Guilherme; Crespo, Luis; Tomas, Pedro ; Roma, Nuno; Neves, Nuno;
PUBLISHED: 2025, SOURCE: 16th Latin America Symposium on Circuits and System-LASCAS-Annual in 2025 IEEE 16TH LATIN AMERICA SYMPOSIUM ON CIRCUITS AND SYSTEMS, LASCAS
6
TITLE: Real-Time ORB Accelerator for Embedded FPGA-Based SoCs With ROS Integration Full Text
AUTHORS: Costa, Andre; Lopes, Jose Duarte; Tomas, Pedro; Roma, Nuno; Neves, Nuno;
PUBLISHED: 2025, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
AUTHORS: Costa, Andre; Lopes, Jose Duarte; Tomas, Pedro; Roma, Nuno; Neves, Nuno;
PUBLISHED: 2025, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
7
TITLE: A Survey on Stream-Based Architectures: From Accelerators to CPUs
AUTHORS: Crespo, Luis; Neves, Nuno; Tomas, Pedro; Roma, Nuno;
PUBLISHED: 2025, SOURCE: PROCEEDINGS OF THE IEEE
AUTHORS: Crespo, Luis; Neves, Nuno; Tomas, Pedro; Roma, Nuno;
PUBLISHED: 2025, SOURCE: PROCEEDINGS OF THE IEEE
8
TITLE: Alternative Reference Samples to Improve Coding Efficiency for Parallel Intra Prediction Solutions
AUTHORS: Storch, Iago; Roma, Nuno; Palomino, Daniel; Bampi, Sergio;
PUBLISHED: 2024, SOURCE: 15th Latin American Symposium on Circuits and Systems (LASCAS) in 15TH IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS, LASCAS 2024
AUTHORS: Storch, Iago; Roma, Nuno; Palomino, Daniel; Bampi, Sergio;
PUBLISHED: 2024, SOURCE: 15th Latin American Symposium on Circuits and Systems (LASCAS) in 15TH IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS, LASCAS 2024
INDEXED IN: 
Scopus 
WOS
Scopus WOS9
TITLE: Gpu-Based Parallelisation of a Versatile Video Coding Adaptive Loop Filter in Resource-Constrained Heterogeneous Embedded Platform
AUTHORS: Anup Saha; Nuno Roma; Miguel Chavarrías; Tiago Dias; Fernando Pescador; Víctor Aranda;
PUBLISHED: 2022, SOURCE: SSRN Electronic Journal
AUTHORS: Anup Saha; Nuno Roma; Miguel Chavarrías; Tiago Dias; Fernando Pescador; Víctor Aranda;
PUBLISHED: 2022, SOURCE: SSRN Electronic Journal
10
TITLE: Euro-Par 2021: Parallel Processing - 27th International Conference on Parallel and Distributed Computing, Lisbon, Portugal, September 1-3, 2021, Proceedings
AUTHORS: Leonel Sousa; Nuno Roma; Pedro Tomás;
PUBLISHED: 2021, SOURCE: Euro-Par, VOLUME: 12820
AUTHORS: Leonel Sousa; Nuno Roma; Pedro Tomás;
PUBLISHED: 2021, SOURCE: Euro-Par, VOLUME: 12820
INDEXED IN: 
DBLP
DBLP