Pedro Nuno Ferreira da Rosa da Cruz Diniz


AuthID: R-000-F2M

Confirmed Publications: 143



91
TITLE: An overview of the ECO project
AUTHORS: Chame, J; Chen, C; Diniz, P ; Hall, M; Lee, YJ; Lucas, RF;
PUBLISHED: 2006, SOURCE: 20th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2006 in 20th International Parallel and Distributed Processing Symposium, IPDPS 2006, VOLUME: 2006
INDEXED IN: Scopus
92
TITLE: Array replication to increase parallelism in applications mapped to configurable architectures
AUTHORS: Ziegler, HE; Malusare, PL; Diniz, PC ;
PUBLISHED: 2006, SOURCE: 18th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2005 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 4339 LNCS
INDEXED IN: Scopus
93
TITLE: Design of a field-programmable dual-precision floating-point arithmetic unit
AUTHORS: Diniz, PC ; Govindu, G;
PUBLISHED: 2006, SOURCE: 2006 International Conference on Field Programmable Logic and Applications, FPL in Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL
INDEXED IN: Scopus
94
TITLE: Memory parallelism using custom array mapping to heterogeneous storage structures
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2006, SOURCE: 2006 International Conference on Field Programmable Logic and Applications, FPL in Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL
INDEXED IN: Scopus
95
TITLE: A register allocation algorithm in the presence of scalar replacement for fine-grain configurable architectures  Full Text
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2005, SOURCE: Design, Automation and Test in Europe, DATE '05 in Proceedings -Design, Automation and Test in Europe, DATE '05, VOLUME: I
INDEXED IN: Scopus
96
TITLE: Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system  Full Text
AUTHORS: Diniz, P ; Hall, M; Park, J; So, B; Ziegler, H;
PUBLISHED: 2005, SOURCE: Microprocessors and Microsystems, VOLUME: 29, ISSUE: 2-3
INDEXED IN: Scopus CrossRef: 15
IN MY: ORCID
97
TITLE: Compiler-directed design space exploration for caching and prefetching data in high-level synthesis
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2005, SOURCE: 2005 IEEE International Conference on Field Programmable Technology in Proceedings - 2005 IEEE International Conference on Field Programmable Technology, VOLUME: 2005
INDEXED IN: Scopus
98
TITLE: Empirical optimization for a sparse linear solver: A case study  Full Text
AUTHORS: Lee, YJ; Diniz, PC ; Hall, MW; Lucas, R;
PUBLISHED: 2005, SOURCE: International Journal of Parallel Programming, VOLUME: 33, ISSUE: 2-3
INDEXED IN: Scopus CrossRef: 6
IN MY: ORCID
99
TITLE: Evaluation of code generation strategies for scalar replaced codes in fine-grain configurable architectures
AUTHORS: Diniz, PC ;
PUBLISHED: 2005, SOURCE: 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005 in Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005, VOLUME: 2005
INDEXED IN: Scopus
100
TITLE: Exploiting data reuse in modern FPGAs: Opportunities and challenges for compilers
AUTHORS: Baradaran, N; Diniz, P ;
PUBLISHED: 2005, SOURCE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005
INDEXED IN: Scopus
Page 10 of 15. Total results: 143.

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