211
TITLE: Using Lower-Bound Estimates in SAT-Based Pseudo-Boolean Optimization PDF
AUTHORS: Vasco M. Manquinho; João Marques Marques Silva ;
PUBLISHED: 2004, SOURCE: SAT 2004 - The Seventh International Conference on Theory and Applications of Satisfiability Testing, 10-13 May 2004, Vancouver, BC, Canada, Online Proceedings
INDEXED IN: DBLP
IN MY: DBLP
212
TITLE: Using Rewarding Mechanisms for Improving Branching Heuristics PDF
AUTHORS: Elsa Carvalho; João Marques Marques Silva ;
PUBLISHED: 2004, SOURCE: SAT 2004 - The Seventh International Conference on Theory and Applications of Satisfiability Testing, 10-13 May 2004, Vancouver, BC, Canada, Online Proceedings
INDEXED IN: DBLP
IN MY: DBLP
213
TITLE: An overview of backtrack search satisfiability algorithms  Full Text
AUTHORS: Lynce, I ; Marques Silva, JP ;
PUBLISHED: 2003, SOURCE: ANNALS OF MATHEMATICS AND ARTIFICIAL INTELLIGENCE, VOLUME: 37, ISSUE: 3
INDEXED IN: Scopus WOS DBLP CrossRef: 11
214
TITLE: Heuristic backtracking algorithms for SAT  Full Text
AUTHORS: Bhalla, A; Lynce, I ; de Sousa, JT; Marques Silva, J ;
PUBLISHED: 2003, SOURCE: 4th International Workshop on Microprocessor Test and Verification in 4TH INTERNATIONAL WORKSHOP ON MICROPROCESSOR TEST AND VERIFICATION: COMMON CHALLENGES AND SOLUTIONS, PROCEEDINGS, VOLUME: 2003-January
INDEXED IN: Scopus WOS DBLP CrossRef: 7
IN MY: DBLP
215
TITLE: Heuristic-based backtracking for propositional satisfiability
AUTHORS: Bhalla, A; Lynce, I ; de Sousa, JT; Marques Silva, J ;
PUBLISHED: 2003, SOURCE: 11th Portuguese Conference on Artificial Intelligence in PROGRESS IN ARTIFICIAL INTELLIGENCE-B, VOLUME: 2902
INDEXED IN: Scopus WOS DBLP
216
TITLE: Probing-based preprocessing techniques for propositional satisfiability
AUTHORS: Lynce, I ; Marques Silva, J ;
PUBLISHED: 2003, SOURCE: 15th IEEE International Conference on Tools with Artificial Intelligence (ICTAI 2003) in 15TH IEEE INTERNATIONAL CONFERENCE ON TOOLS WITH ARTIFICIAL INTELLIGENCE, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef: 14
217
TITLE: Solving satisfiability in combinational circuits  Full Text
AUTHORS: Marques Silva, J ; Silva, LGE ;
PUBLISHED: 2003, SOURCE: IEEE DESIGN & TEST OF COMPUTERS, VOLUME: 20, ISSUE: 4
INDEXED IN: Scopus WOS DBLP CrossRef: 10 Unpaywall
218
TITLE: The effect of nogood recording in DPLL-CBJ SAT algorithms  Full Text
AUTHORS: Lynce, I ; Marques Silva, J ;
PUBLISHED: 2003, SOURCE: Joint ERCIM/CologNet International Workshop on Constraint Solving and Constraint Logic Programming in RECENT ADVANCES IN CONSTRAINTS, VOLUME: 2627
INDEXED IN: Scopus WOS DBLP
219
TITLE: Building state-of-the-art SAT solvers
AUTHORS: Lynce, I ; Marques Silva, J ;
PUBLISHED: 2002, SOURCE: 15th European Conference on Artificial Intelligence in ECAI 2002: 15TH EUROPEAN CONFERENCE ON ARTIFICIAL INTELLIGENCE, PROCEEDINGS, VOLUME: 77
INDEXED IN: WOS DBLP
IN MY: DBLP
220
TITLE: Satisfiability models and algorithms for circuit delay computation  Full Text
AUTHORS: Silva, LGE ; Marques Silva, J ; Silveira, L. Miguel ; Sakallah, KA;
PUBLISHED: 2002, SOURCE: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, VOLUME: 7, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef Unpaywall
IN MY: ORCID | DBLP
Page 22 of 27. Total results: 266.