João Paulo Marques da Silva


AuthID: R-000-J0P

Confirmed Publications: 266



241
TITLE: Combinational equivalence checking using satisfiability and recursive learning
AUTHORS: Marques Silva, J ; Glass, T;
PUBLISHED: 1999, SOURCE: Design, Automation and Test in Europe Conference and Exhibition in DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef: 13
IN MY: DBLP
242
TITLE: GRASP: A search algorithm for propositional satisfiability
AUTHORS: Marques Silva, JP ; Sakallah, KA;
PUBLISHED: 1999, SOURCE: IEEE TRANSACTIONS ON COMPUTERS, VOLUME: 48, ISSUE: 5
INDEXED IN: Scopus WOS DBLP CrossRef Unpaywall
IN MY: ORCID | ResearcherID | DBLP
243
TITLE: On applying set covering models to test set compaction  Full Text
AUTHORS: Flores, PF ; Neto, HC ; Marques Silva, JP ;
PUBLISHED: 1999, SOURCE: 9th Great Lakes Symposium on VLSI (GLSVLSI 99) in NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef: 13
IN MY: ORCID | DBLP
244
TITLE: Satisfiability-Based Functional Delay Fault Testing
AUTHORS: Joonyoung Kim; João Marques Marques Silva ; Karem A. Sakallah;
PUBLISHED: 1999, SOURCE: VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI '99), December 1-4, 1999, Lisbon, Portugal, VOLUME: 162
INDEXED IN: DBLP
IN MY: DBLP
245
TITLE: Test pattern generation for width compression in BIST
AUTHORS: Flores, P ; Neto, H ; Chakrabarty, K; Marques Silva, J ;
PUBLISHED: 1999, SOURCE: 1999 IEEE International Symposium on Circuits and Systems (ISCAS 99) in ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, VOLUME: 1
INDEXED IN: Scopus WOS DBLP
IN MY: ORCID | DBLP
246
TITLE: The Impact of Branching Heuristics in Propositional Satisfiability Algorithms
AUTHORS: João P Marques Silva ;
PUBLISHED: 1999, SOURCE: 9th Portuguese Conference on Progress in Artificial Intelligence, EPIA 1999 in Progress in Artificial Intelligence, 9th Portuguese Conference on Artificial Intelligence, EPIA '99, Évora, Portugal, September 21-24, 1999, Proceedings, VOLUME: 1695
INDEXED IN: Scopus DBLP Unpaywall
IN MY: DBLP
247
TITLE: An exact solution to the minimum size test pattern problem
AUTHORS: Flores, PF ; Neto, HC ; Silva, JPM ;
PUBLISHED: 1998, SOURCE: International Conference on Computer Design: VLSI in Computers and Processors in INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP
IN MY: ORCID | DBLP
248
TITLE: Efficient search techniques for the inference of minimum size finite automata
AUTHORS: Oliveira, AL ; Silva, JPM ;
PUBLISHED: 1998, SOURCE: South American Symposium on String Processing and Information Retrieval (SPIRE 98) in STRING PROCESSING AND INFORMATION RETRIEVAL - PROCEEDINGS, VOLUME: 1998-September
INDEXED IN: Scopus WOS DBLP CrossRef: 18
249
TITLE: Integer programming models for optimization problems in Test Generation
AUTHORS: Silva, JPM ;
PUBLISHED: 1998, SOURCE: 3rd Meeting of the Asia and South-Pacific Design Automation Conference (ASP-DAC 98) / EDA Techno Fair 98 in PROCEEDINGS OF THE ASP-DAC '98 - ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1998 WITH EDA TECHNO FAIR '98
INDEXED IN: Scopus WOS DBLP
IN MY: DBLP
250
TITLE: Realistic delay modeling in satisfiability-based timing analysis
AUTHORS: e Silva Luis Guerra; Marques Silva Joao, P ; Silveira, L. Miguel ; Sakallah Karem, A;
PUBLISHED: 1998, SOURCE: Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 6
INDEXED IN: Scopus
IN MY: ORCID
Page 25 of 27. Total results: 266.

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