João Paulo Marques da Silva


AuthID: R-000-J0P

Confirmed Publications: 266



251
TITLE: Realistic delay modeling in satisfiability-based timing analysis
AUTHORS: Silva, LG ; Silva, JPM ; Silveira, L. Miguel ; Sakallah, KA;
PUBLISHED: 1998, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS 98) in ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6
INDEXED IN: WOS CrossRef: 8
252
TITLE: Timing analysis using Propositional Satisfiability
AUTHORS: e Silva Luis Guerra; Marques Silva Joao, P ; Silveira, L. Miguel ; Sakallah Karem, A;
PUBLISHED: 1998, SOURCE: Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology in Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, VOLUME: 3
INDEXED IN: Scopus
IN MY: ORCID
253
TITLE: Prime implicant computation using satisfiability algorithms
AUTHORS: Manquinho, VM ; Flores, PF ; Silva, JPM ; Oliveira, AL ;
PUBLISHED: 1997, SOURCE: 9th IEEE International Conference on Tools with Artificial Intelligence in NINTH IEEE INTERNATIONAL CONFERENCE ON TOOLS WITH ARTIFICIAL INTELLIGENCE, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef: 30
254
TITLE: Robust search algorithms for test pattern generation  Full Text
AUTHORS: Silva, JPM ; Sakallah, KA;
PUBLISHED: 1997, SOURCE: 27th Annual International Symposium on Fault-Tolerant Computing (FTCS-27) in TWENTY-SEVENTH ANNUAL INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING, DIGEST OF PAPERS
INDEXED IN: WOS DBLP
IN MY: DBLP
255
TITLE: Conflict analysis in search algorithms for satisfiability
AUTHORS: Silva, JPM ; Sakallah, KA;
PUBLISHED: 1996, SOURCE: 8th IEEE International Conference on Tools with Artificial Intelligence (TAI 96) in EIGHTH IEEE INTERNATIONAL CONFERENCE ON TOOLS WITH ARTIFICIAL INTELLIGENCE, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP
IN MY: DBLP
256
TITLE: GRASP - A new search algorithm for satisfiability  Full Text
AUTHORS: Silva, JPM ; Sakallah, KA;
PUBLISHED: 1996, SOURCE: 1996 IEEE/ACM International Conference on Computer-Aided Design in 1996 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS
INDEXED IN: Scopus WOS DBLP
IN MY: ORCID | DBLP
257
TITLE: Ravel-XL: A hardware accelerator for assigned-delay compiled-code logic gate simulation  Full Text
AUTHORS: Riepe, MA; Marques, JP ; Sakallah, KA; Brown, RB;
PUBLISHED: 1996, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 4, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef Unpaywall
IN MY: ORCID | ResearcherID | DBLP
258
TITLE: Dynamic search-space pruning techniques in path sensitization  Full Text
AUTHORS: Marques Silva Joao, P ; Sakallah Karem, A;
PUBLISHED: 1994, SOURCE: Proceedings of the 31st Design Automation Conference in Proceedings - Design Automation Conference
INDEXED IN: Scopus
IN MY: ORCID
259
TITLE: Dynamic Search-Space Pruning Techniques in Path Sensitization
AUTHORS: João Marques Marques Silva ; Karem A. Sakallah;
PUBLISHED: 1994, SOURCE: Proceedings of the 31st Conference on Design Automation, San Diego, California, USA, June 6-10, 1994.
INDEXED IN: DBLP
IN MY: DBLP
260
TITLE: Efficient and robust test generation-based timing analysis
AUTHORS: Marques Silva Joao, P ; Sakallah Karem, A;
PUBLISHED: 1994, SOURCE: Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 1
INDEXED IN: Scopus
IN MY: ORCID
Page 26 of 27. Total results: 266.

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