61
TITLE: Delay-Fault Tolerance to Power Supply Voltage Disturbances Analysis in Nanometer Technologies  Full Text
AUTHORS: Jorge Semião ; Freijedo, J; Rodriguez Andina, J; Vargas, F; Santos, M ; Teixeira, I ; Teixeira, P;
PUBLISHED: 2009, SOURCE: 15th IEEE International On-Line Testing Symposium in 2009 15TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM
INDEXED IN: Scopus WOS CrossRef
62
TITLE: Measuring Clock-Signal Modulation Efficiency for Systems-on-Chip in Electromagnetic Interference Environment
AUTHORS: Jorge Semião ; Freijedo, J; Moraes, M; Mallmann, M; Antunes, C ; Benfica, J; Vargas, F; Santos, M ; Teixeira, IC ; Rodriguez Andina, JJR; Teixeira, JP ; Lupi, D; Gatti, E; Garcia, L; Hernandez, F;
PUBLISHED: 2009, SOURCE: 10th Latin American Test Workshop in LATW: 2009 10TH LATIN AMERICAN TEST WORKSHOP
INDEXED IN: Scopus WOS CrossRef
63
TITLE: Delay modeling for power noise and temperature-aware design and test of digital systems
AUTHORS: Freijedo, JF; Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2008, SOURCE: Journal of Low Power Electronics, VOLUME: 4, ISSUE: 3
INDEXED IN: Scopus CrossRef
64
TITLE: Exploiting parametric power supply and/or temperature variations to improve fault tolerance in digital circuits
AUTHORS: Jorge Semião ; Freijedo, J; Andina, J; Vargas, F; Santos, M ; Teixeira, I ; Teixeira, P;
PUBLISHED: 2008, SOURCE: 14th IEEE International On-Line Testing Symposium in 14TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS
INDEXED IN: Scopus WOS CrossRef
65
TITLE: Power-Supply Instability Aware Clock Signal Modulation for Digital Integrated Circuits
AUTHORS: Jorge Semião ; Freijedo, J; Moraes, M; Mallmann, M; Antunes, C ; Rocha, L; Benfica, J; Vargas, F; Santos, M ; Teixeira, IC ; Rodriguez Andina, JJR; Teixeira, JP; Lupi, D; Gatti, E; Garcia, L; Hernandez, F;
PUBLISHED: 2008, SOURCE: International Symposium on Electromagnetic Compatibility in 2008 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC EUROPE)
INDEXED IN: Scopus WOS CrossRef
66
TITLE: Process tolerant design using thermal and power-supply tolerance in pipeline based circuits
AUTHORS: Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Santos, M ; Teixeira, I ; Teixeira, P;
PUBLISHED: 2008, SOURCE: 11th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems in 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS
INDEXED IN: Scopus WOS CrossRef
67
TITLE: Robust Solution for Synchronous Communication among Multi Clock Domains
AUTHORS: Jorge Semião ; Varela, J ; Freijedo, J; Andina, J; Leong, C; Teixeira, JP ; Teixeira, I ;
PUBLISHED: 2008, SOURCE: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2008) in 2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4
INDEXED IN: Scopus WOS CrossRef
68
TITLE: Signal integrity enhancement in digital circuits  Full Text
AUTHORS: Jorge Semião ; Marcial Jesus R Rodriguez Irago; Juan J Rodriguez Andina; Leonardo Bisch Piccoli; Fabian Luis Vargas; Marcelino Bicho dos Santos ; Isabel Maria C Cacho Teixeira ; Joao Paulo Teixeira ;
PUBLISHED: 2008, SOURCE: IEEE DESIGN & TEST OF COMPUTERS, VOLUME: 25, ISSUE: 5
INDEXED IN: Scopus WOS CrossRef
69
TITLE: Time Management for Low-Power Design of Digital Systems
AUTHORS: Jorge Semião ; Freijedo, JF; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2008, SOURCE: Journal of Low Power Electronics, VOLUME: 4, ISSUE: 3
INDEXED IN: Scopus CrossRef
70
TITLE: Enhancing the tolerance to power-supply instability in digital circuits
AUTHORS: Jorge Semião ; Freijedo, J; Rodriguez J R Andina; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: IEEE-Computer-Society Annual Symposium on VLSI in IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: EMERGING VLSI TECHNOLOGIES AND ARCHITECTURES
INDEXED IN: Scopus WOS CrossRef
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