31
TITLE: Design Automation Tasks Scheduling for Enhanced Parallel Execution of a State-of-the-Art Layout-Aware Sizing Approach  Full Text
AUTHORS: David Neves; Ricardo Martins ; Nuno Lourenco ; Nuno Horta ;
PUBLISHED: 2016, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
INDEXED IN: Scopus WOS
IN MY: ORCID
32
TITLE: AIDA-PEx: Accurate Parasitic Extraction for Layout-Aware Analog Integrated Circuit Sizing
AUTHORS: Bruno Cardoso; Ricardo Martins ; Nuno Lourenco ; Nuno Horta ;
PUBLISHED: 2015, SOURCE: 2015 11th Conference on PhD Res in Microelect & Elect PRIME in 2015 11TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME)
INDEXED IN: Scopus WOS CrossRef
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33
TITLE: AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation
AUTHORS: Ricardo Martins ; Nuno Lourenco ; Antonio Canelas; Ricardo Povoa; Nuno Horta ;
PUBLISHED: 2015, SOURCE: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) in 2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
INDEXED IN: Scopus WOS CrossRef: 16
IN MY: ORCID
34
TITLE: Analog IC Placement using Absolute Coordinates and a Hierarchical Combination of Pareto Optimal Fronts
AUTHORS: Ricardo Martins ; Nuno Lourenco ; Nuno Horta ;
PUBLISHED: 2015, SOURCE: 2015 11th Conference on PhD Res in Microelect & Elect PRIME in 2015 11TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME)
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID
35
TITLE: Embedding Fault List Compression Techniques in a Design Automation Framework for Analog and Mixed-Signal Structural Testing
AUTHORS: Ricardo Martins ; Nuno Lourenco ; Nuno Horta ; Nuno Guerreiro; Marcelino Santos;
PUBLISHED: 2015, SOURCE: 2015 Conference on Design of Circuits and Integrated Systems (DCIS) in 2015 Conference on Design of Circuits and Integrated Systems (DCIS)
INDEXED IN: Scopus WOS CrossRef
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36
TITLE: Exploring Design Tradeoffs in Analog IC Placement with Current-Flow & Current-Density Considerations
AUTHORS: Ricardo Martins ; Ricardo Povoa; Nuno Lourenco ; Nuno Horta ;
PUBLISHED: 2015, SOURCE: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) in 2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID
37
TITLE: Extraction and Application of Wiring Symmetry Rules to Route Analog Multiport Terminals
AUTHORS: Ricardo Martins ; Nuno Lourenco ; Antonio Canelas; Nuno Horta ;
PUBLISHED: 2015, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
INDEXED IN: Scopus WOS CrossRef: 1
IN MY: ORCID
38
TITLE: Floorplan-aware analog IC sizing and optimization based on topological constraints  Full Text
AUTHORS: Nuno Lourenco ; Antonio Canelas; Ricardo Povoa; Ricardo Martins ; Nuno Horta ;
PUBLISHED: 2015, SOURCE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 48, ISSUE: 1
INDEXED IN: Scopus WOS CrossRef: 19
IN MY: ORCID
39
TITLE: Layout-Aware Sizing of Analog ICs using Floorplan & Routing Estimates for Parasitic Extraction
AUTHORS: Lourenco, N ; Martins, R ; Horta, N ;
PUBLISHED: 2015, SOURCE: Conference on Design Automation Test in Europe (DATE) in 2015 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), VOLUME: 2015-April
INDEXED IN: Scopus WOS
IN MY: ORCID
40
TITLE: Multi-objective optimization of analog integrated circuit placement hierarchy in absolute coordinates  Full Text
AUTHORS: Ricardo Martins ; Nuno Lourenco ; Nuno Horta ;
PUBLISHED: 2015, SOURCE: EXPERT SYSTEMS WITH APPLICATIONS, VOLUME: 42, ISSUE: 23
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID
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