31
TITLE: An efficient and scalable architecture for neural networks with backpropagation learning
AUTHORS: Domingos, PO; Silva, FM ; Neto, HC ;
PUBLISHED: 2005, SOURCE: 2005 International Conference on Field Programmable Logic and Applications, FPL in Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL, VOLUME: 2005
INDEXED IN: Scopus CrossRef
IN MY: ORCID
32
TITLE: Compilation for FPGA-based reconfigurable hardware  Full Text
AUTHORS: Cardoso, JMP ; Neto, HC ;
PUBLISHED: 2003, SOURCE: IEEE DESIGN & TEST OF COMPUTERS, VOLUME: 20, ISSUE: 2
INDEXED IN: Scopus WOS DBLP CrossRef: 31
IN MY: ORCID
33
TITLE: An exact solution to the minimum size test pattern problem  Full Text
AUTHORS: Flores, PF ; Neto, HC ; Marques Silva, JP ;
PUBLISHED: 2001, SOURCE: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, VOLUME: 6, ISSUE: 4
INDEXED IN: Scopus WOS DBLP CrossRef Unpaywall
IN MY: ORCID
34
TITLE: Assignment and reordering of incompletely specified pattern sequences targetting minimum power dissipation
AUTHORS: Flores, P ; Costa, J; Neto, H ; Monteiro, J ; Marques Silva, J ;
PUBLISHED: 1999, SOURCE: 12th International Conference on VLSI Design in TWELFTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef: 30 Unpaywall
IN MY: ORCID
35
TITLE: Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System
AUTHORS: João M P Cardoso ; Horácio C Neto ;
PUBLISHED: 1999, SOURCE: Proceedings of the 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCMM 1999) in 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA
INDEXED IN: Scopus DBLP CrossRef: 14
IN MY: ORCID
36
TITLE: On applying set covering models to test set compaction  Full Text
AUTHORS: Flores, PF ; Neto, HC ; Marques Silva, JP ;
PUBLISHED: 1999, SOURCE: 9th Great Lakes Symposium on VLSI (GLSVLSI 99) in NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef: 13
IN MY: ORCID
37
TITLE: Test pattern generation for width compression in BIST
AUTHORS: Flores, P ; Neto, H ; Chakrabarty, K; Marques Silva, J ;
PUBLISHED: 1999, SOURCE: 1999 IEEE International Symposium on Circuits and Systems (ISCAS 99) in ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, VOLUME: 1
INDEXED IN: Scopus WOS DBLP
IN MY: ORCID
38
TITLE: An exact solution to the minimum size test pattern problem
AUTHORS: Flores, PF ; Neto, HC ; Silva, JPM ;
PUBLISHED: 1998, SOURCE: International Conference on Computer Design: VLSI in Computers and Processors in INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP
IN MY: ORCID
39
TITLE: ON EXPONENTIAL FITTING FOR CIRCUIT SIMULATION  Full Text
AUTHORS: Silveira, L. Miguel ; WHITE, JK; NETO, H ; VIDIGAL, L;
PUBLISHED: 1992, SOURCE: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOLUME: 11, ISSUE: 5
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID
40
TITLE: Multirate algorithm for fast circuit simulation
AUTHORS: Neto, HC ; Vidigal, LM;
PUBLISHED: 1989, SOURCE: European Conference on Circuit Theory and Design in IEE Conference Publication, ISSUE: 308
INDEXED IN: Scopus
IN MY: ORCID
Page 4 of 4. Total results: 40.