João Manuel Paiva Cardoso


AuthID: R-000-75E

Confirmed Publications: 264



231
232
233
TITLE: Regular expression matching for reconfigurable packet inspection
AUTHORS: Joao Bispo ; Ioannis Sourdis; Joao M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: 5th IEEE International Conference on Field Programmable Technology in 2006 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef: 73
IN MY: ORCID | ResearcherID | DBLP
234
235
TITLE: <title>Data-driven array architectures: a rebirth?</title>
AUTHORS: Joao M P Cardoso ;
PUBLISHED: 2005, SOURCE: VLSI Circuits and Systems II
INDEXED IN: CrossRef
IN MY: ORCID | ResearcherID
236
TITLE: A test infrastructure for compilers targeting FPGAs
AUTHORS: Rodrigues, RMM; Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005
INDEXED IN: Scopus
IN MY: ORCID
237
TITLE: An infrastructure to functionally test designs generated by compilers targeting FPGAs  Full Text
AUTHORS: Rodrigues, R; Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 05) in DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, VOLUME: I
INDEXED IN: Scopus WOS DBLP CrossRef: 3
IN MY: ORCID | ResearcherID | DBLP
238
TITLE: CHIADO - Compilation of high-level computationally intensive algorithms to dynamically reconfligurable computing systems
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Conference on VLSI Circuits and Systems II in VLSI Circuits and Systems II, Pts 1 and 2, VOLUME: 5837
INDEXED IN: Scopus WOS
IN MY: ORCID | ResearcherID
239
TITLE: Compilation and temporal partitioning for a coarse-grain reconfigurable architecture  Full Text
AUTHORS: Cardoso, JMP ; Weinhardt, M;
PUBLISHED: 2005, SOURCE: New Algorithms, Architectures and Applications for Reconfigurable Computing
INDEXED IN: Scopus CrossRef: 2
IN MY: ORCID | ResearcherID
240
TITLE: Data-driven array architectures: a rebirth?
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Conference on VLSI Circuits and Systems II in VLSI Circuits and Systems II, Pts 1 and 2, VOLUME: 5837
INDEXED IN: Scopus WOS
IN MY: ORCID | ResearcherID
Page 24 of 27. Total results: 264.

A place for researchers and their institutions

Useful Links

Get Help

© 2024 CRACS & Inesc TEC - All Rights Reserved Privacy Policy | Terms of Service