2
TITLE: Uneven memory regulation for scheduling IMA applications on multi-core platforms  Full Text
AUTHORS: Awan, MA; Souto, PF ; Akesson, B; Bletsas, K; Tovar, E ;
PUBLISHED: 2019, SOURCE: REAL-TIME SYSTEMS, VOLUME: 55, ISSUE: 2
INDEXED IN: Scopus WOS CrossRef: 3
3
TITLE: Techniques and Analysis for Mixed-criticality Scheduling with Mode-dependent Server Execution Budgets  Full Text
AUTHORS: Awan, MA; Bletsas, KN; Souto, PF ; Akesson, B; Tovar, E ;
PUBLISHED: 2019, SOURCE: Embedded Systems Week / Int Conf on Compilers, Architecture, and Synthesis for Embedded Systems (CASES) / International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) / Int Conf on Embedded Software (EMSOFT) in ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, VOLUME: 18, ISSUE: 5
INDEXED IN: Scopus WOS DBLP CrossRef
4
TITLE: Memory bandwidth regulation for multiframe task sets
AUTHORS: Awan, MA; Souto, PF ; Bletsas, K; Akesson, B; Tovar, E ;
PUBLISHED: 2019, SOURCE: 25th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2019 in Proceedings - 2019 IEEE 25th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2019
INDEXED IN: Scopus CrossRef: 1
5
TITLE: Memory Bandwidth Regulation for Multiframe Task Sets
AUTHORS: Muhammad Ali Awan; Pedro F Souto ; Konstantinos Bletsas; Benny Akesson; Eduardo Tovar ;
PUBLISHED: 2019, SOURCE: 25th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2019, Hangzhou, China, August 18-21, 2019
INDEXED IN: DBLP
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TITLE: Memory Bandwidth Regulation for Multiframe Task Sets
AUTHORS: Awan, Muhammad Ali; Souto, Pedro F. ; Bletsas, Konstantinos; Akesson, Benny; Tovar, Eduardo;
PUBLISHED: 2019, SOURCE: 25th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA) in 2019 IEEE 25TH INTERNATIONAL CONFERENCE ON EMBEDDED AND REAL-TIME COMPUTING SYSTEMS AND APPLICATIONS (RTCSA 2019)
INDEXED IN: WOS
8
TITLE: Time-Triggered Co-Scheduling of Computation and Communication with Jitter Requirements
AUTHORS: Anna Minaeva; Benny Akesson; Zdenek Hanzalek; Dakshina Dasari;
PUBLISHED: 2018, SOURCE: IEEE TRANSACTIONS ON COMPUTERS, VOLUME: 67, ISSUE: 1
INDEXED IN: WOS
9
TITLE: Mixed-criticality scheduling with memory bandwidth regulation
AUTHORS: Muhammad Ali Awan; Pedro F Souto ; Konstantinos Bletsas; Benny Akesson; Eduardo Tovar ;
PUBLISHED: 2018, SOURCE: 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 in 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, VOLUME: 2018-January
INDEXED IN: Scopus DBLP CrossRef: 1
10
TITLE: Worst-case Stall Analysis for Multicore Architectures with Two Memory Controllers  Full Text
AUTHORS: Muhammad Ali Awan; Pedro F Souto ; Konstantinos Bletsas; Benny Akesson; Eduardo Tovar ;
PUBLISHED: 2018, SOURCE: 30th Euromicro Conference on Real-Time Systems, ECRTS 2018 in 30th Euromicro Conference on Real-Time Systems, ECRTS 2018, July 3-6, 2018, Barcelona, Spain, VOLUME: 106
INDEXED IN: Scopus DBLP
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