21
TITLE: Quaternary Logic Lookup Table in Standard CMOS  Full Text
AUTHORS: Brito, D; Rabuske, TG; Fernandes, JR; Flores, P; Monteiro, J ;
PUBLISHED: 2015, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 23, ISSUE: 2
INDEXED IN: Scopus WOS CrossRef: 10
22
TITLE: An 8-bit 0.35-V 5.04-fJ/Conversion-Step SAR ADC With Background Self-Calibration of Comparator Offset  Full Text
AUTHORS: Rabuske, T; Rabuske, F; Fernandes, J; Rodrigues, C;
PUBLISHED: 2015, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 23, ISSUE: 7
INDEXED IN: Scopus WOS CrossRef: 19
23
TITLE: An 8-bit 0.35-V 5.04-fJ/Conversion-Step SAR ADC with Background Self-Calibration of Comparator Offset
AUTHORS: Rabuske, T; Rabuske, F; Fernandes, J; Rodrigues, C;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 7
INDEXED IN: Scopus
24
TITLE: Quaternary logic lookup table in standard CMOS
AUTHORS: Brito, D; Rabuske, TG; Fernandes, JR; Flores, P; Monteiro, J;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 2
INDEXED IN: Scopus
25
TITLE: A 9-b 0.4-V Charge-Mode SAR ADC with 1.6-V Input Swing and a MOSCAP-only DAC
AUTHORS: Taimur Rabuske; Jorge Fernandes;
PUBLISHED: 2015, SOURCE: 41st European Solid-State Circuits Conference (ESSCIRC) in ESSCIRC CONFERENCE 2015 - 41ST EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (ESSCIRC)
INDEXED IN: WOS
26
TITLE: An Efficient RF Power Harvester for Low Input Power with Reduced Dead-zone
AUTHORS: Hugo Goncalves; Jorge Fernandes; Taimur Rabuske; Miguel Martins;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: Scopus WOS CrossRef
27
TITLE: Quadrature Relaxation Oscillator with FoM of-165 dBc/Hz
AUTHORS: Ortigueira, E; Taimur Rabuske; Luis Bica Oliveira; Fernandes, J; Silva, M;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: Scopus WOS CrossRef
28
TITLE: A sub-ranging 2-Step 7-bit self-calibrated comparator-based binary-search ADC
AUTHORS: Rabuske, F; Rabuske, T; Fernandes, J;
PUBLISHED: 2014, SOURCE: 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 in Proceedings - IEEE International Symposium on Circuits and Systems
INDEXED IN: Scopus CrossRef
29
TITLE: Noise-aware simulation-based sizing and optimization of clocked comparators  Full Text
AUTHORS: Taimur Rabuske; Jorge Fernandes;
PUBLISHED: 2014, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 81, ISSUE: 3
INDEXED IN: Scopus WOS
30
TITLE: A Sub-Ranging 2-Step 7-bit Self-Calibrated Comparator-Based Binary-Search ADC
AUTHORS: Fabio Rabuske; Taimur Rabuske; Jorge Fernandes;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: WOS
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