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TITLE: Power estimation using probability polynomials  Full Text
AUTHORS: Costa, J; Silveira, L. Miguel ; Devadas, S; Monteiro, J ;
PUBLISHED: 2004, SOURCE: DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, VOLUME: 9, ISSUE: 1
INDEXED IN: Scopus WOS CrossRef
2
TITLE: Observability analysis of embedded software for coverage-directed validation
AUTHORS: Costa, JC; Devadas, S; Monteiro, JC ;
PUBLISHED: 2000, SOURCE: IEEE/ACM International Conference on Computer Aided Design (ICCAD-2000) in ICCAD - 2000 : IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN
INDEXED IN: Scopus WOS CrossRef
4
TITLE: A probabilistic approach for RT-level power modeling
AUTHORS: Costa, J; Monteiro, J; Silveira, L. Miguel ; Devadas, S;
PUBLISHED: 1999, SOURCE: 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999 in Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, VOLUME: 2
INDEXED IN: Scopus CrossRef
5
TITLE: Sequential logic optimization for low power using input-disabling precomputation architectures  Full Text
AUTHORS: Monteiro, J ; Devadas, S; Ghosh, A;
PUBLISHED: 1998, SOURCE: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOLUME: 17, ISSUE: 3
INDEXED IN: Scopus WOS CrossRef
6
TITLE: Switching activity estimation using limited depth reconvergent path analysis
AUTHORS: Costa, JC; Monteiro, JC ; Devadas, S;
PUBLISHED: 1997, SOURCE: 1997 International Symposium on Low Power Electronics and Design in 1997 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, PROCEEDINGS
INDEXED IN: Scopus WOS
7
TITLE: Estimation of average switching activity in combinational logic circuits using symbolic simulation  Full Text
AUTHORS: Monteiro, J ; Devadas, S; Ghosh, A; Keutzer, K; White, J;
PUBLISHED: 1997, SOURCE: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOLUME: 16, ISSUE: 1
INDEXED IN: Scopus WOS CrossRef
8
TITLE: Scheduling techniques to enable power management  Full Text
AUTHORS: Monteiro, J ; Devadas, S; Ashar, P; Mauskar, A;
PUBLISHED: 1996, SOURCE: 33rd Design Automation Conference in 33RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 1996
INDEXED IN: Scopus WOS CrossRef
9
TITLE: Techniques for power estimation and optimization at the logic level: A survey  Full Text
AUTHORS: Monteiro, J ; Devadas, S;
PUBLISHED: 1996, SOURCE: JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 13, ISSUE: 2-3
INDEXED IN: Scopus WOS CrossRef
10
TITLE: Techniques for the power estimation of sequential logic circuits under user-specified input sequences and programs
AUTHORS: Jose Monteiro ; Srinivas Devadas;
PUBLISHED: 1995, SOURCE: Proceedings of the 1995 International Symposium on Low Power Design in Proceedings of the International Symposium on Low Power Design
INDEXED IN: Scopus
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