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TITLE: Techniques for the power estimation of sequential logic circuits under user-specified input sequences and programs
AUTHORS: Jose Monteiro ; Srinivas Devadas;
PUBLISHED: 1995, SOURCE: Proceedings of the 1995 International Symposium on Low Power Design in Proceedings of the International Symposium on Low Power Design
INDEXED IN: Scopus
12
TITLE: Bitwise encoding of finite state machines
AUTHORS: Jose Monteiro ; James Kukula; Srinivas Devadas; Horacio Neto;
PUBLISHED: 1994, SOURCE: Proceedings of the 7th International Conference on VLSI Design in Proceedings of the IEEE International Conference on VLSI Design
INDEXED IN: Scopus
13
TITLE: Methodology for efficient estimation of switching activity in sequential logic circuits  Full Text
AUTHORS: Jose Monteiro ; Srinivas Devadas; Bill Lin;
PUBLISHED: 1994, SOURCE: Proceedings of the 31st Design Automation Conference in Proceedings - Design Automation Conference
INDEXED IN: Scopus
14
TITLE: Precomputation-based sequential logic optimization for low power  Full Text
AUTHORS: Mazhar Alidina; Jose Monteiro ; Srinivas Devadas; Abhijit Ghosh; Marios Papaefthymiou;
PUBLISHED: 1994, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 2, ISSUE: 4
INDEXED IN: Scopus CrossRef
Page 2 of 2. Total results: 14.