Hector Pettenghi Roldan
AuthID: R-000-XX8
11
TITLE: EFFICIENT METHOD FOR DESIGNING MODULO {2(n) +/- k} MULTIPLIERS Full Text
AUTHORS: Hector Pettenghi; Sorin Cotofana; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, VOLUME: 23, ISSUE: 1
AUTHORS: Hector Pettenghi; Sorin Cotofana; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, VOLUME: 23, ISSUE: 1
12
TITLE: Method for designing Multi-Channel RNS Architectures to prevent Power Analysis SCA
AUTHORS: Pettenghi, H; Ambrose, JA; Chaves, R ; Sousa, L ;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
AUTHORS: Pettenghi, H; Ambrose, JA; Chaves, R ; Sousa, L ;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
13
TITLE: Method for Designing Efficient Mixed Radix Multipliers Full Text
AUTHORS: Pettenghi, H; Pratas, F; Sousa, L ;
PUBLISHED: 2014, SOURCE: CIRCUITS SYSTEMS AND SIGNAL PROCESSING, VOLUME: 33, ISSUE: 10
AUTHORS: Pettenghi, H; Pratas, F; Sousa, L ;
PUBLISHED: 2014, SOURCE: CIRCUITS SYSTEMS AND SIGNAL PROCESSING, VOLUME: 33, ISSUE: 10
14
TITLE: Operation limits for RTD-based MOBILE circuits
AUTHORS: Quintana, JM; Avedillo, MJ; Nunez, J; Pettenghi Roldan, H;
PUBLISHED: 2009, SOURCE: IEEE Transactions on Circuits and Systems I: Regular Papers, VOLUME: 56, ISSUE: 2
AUTHORS: Quintana, JM; Avedillo, MJ; Nunez, J; Pettenghi Roldan, H;
PUBLISHED: 2009, SOURCE: IEEE Transactions on Circuits and Systems I: Regular Papers, VOLUME: 56, ISSUE: 2
15
TITLE: Using multi-threshold threshold gates in RTD-based logic design: A case study Full Text
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2008, SOURCE: Microelectronics Journal, VOLUME: 39, ISSUE: 2
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2008, SOURCE: Microelectronics Journal, VOLUME: 39, ISSUE: 2
16
TITLE: A novel contribution to the RTD-based threshold logic family
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2008, SOURCE: 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 in Proceedings - IEEE International Symposium on Circuits and Systems
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2008, SOURCE: 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 in Proceedings - IEEE International Symposium on Circuits and Systems
17
TITLE: Non return mobile logic family
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2007, SOURCE: 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 in Proceedings - IEEE International Symposium on Circuits and Systems
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2007, SOURCE: 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 in Proceedings - IEEE International Symposium on Circuits and Systems
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18
TITLE: Non Return Mobile Logic Family
AUTHORS: Hector Pettenghi; Maria J Avedillo; Jose M Quintana;
PUBLISHED: 2007, SOURCE: 2007 IEEE International Symposium on Circuits and Systems (ISCAS)
AUTHORS: Hector Pettenghi; Maria J Avedillo; Jose M Quintana;
PUBLISHED: 2007, SOURCE: 2007 IEEE International Symposium on Circuits and Systems (ISCAS)
19
TITLE: Self-latching operation of MOBILE circuits using series-connection of RTDs and transistors
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Circuits and Systems II: Express Briefs, VOLUME: 53, ISSUE: 5
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Circuits and Systems II: Express Briefs, VOLUME: 53, ISSUE: 5
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TITLE: Increased logic functionality of clocked series-connected RTDS
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi Roldan, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Nanotechnology, VOLUME: 5, ISSUE: 5
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi Roldan, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Nanotechnology, VOLUME: 5, ISSUE: 5