Shady Issa
AuthID: R-00J-7NY
1
TITLE: Extending hardware transactional memory capacity via rollback-only transactions and suspend/resume POWER8 TM Full Text
AUTHORS: Shady Issa; Pascal Felber; Alexander Matveev; Paolo Romano ;
PUBLISHED: 2020, SOURCE: DISTRIBUTED COMPUTING, VOLUME: 33, ISSUE: 3-4
AUTHORS: Shady Issa; Pascal Felber; Alexander Matveev; Paolo Romano ;
PUBLISHED: 2020, SOURCE: DISTRIBUTED COMPUTING, VOLUME: 33, ISSUE: 3-4
INDEXED IN: 
Scopus 
WOS
Scopus WOS2
TITLE: Exploiting Symbolic Execution to Accelerate Deterministic Databases
AUTHORS: Issa, S; Viegas, M; Raminhas, P; Machado, N; Matos, M ; Romano, P;
PUBLISHED: 2020, SOURCE: 40th IEEE International Conference on Distributed Computing Systems (ICDCS) in 2020 IEEE 40TH INTERNATIONAL CONFERENCE ON DISTRIBUTED COMPUTING SYSTEMS (ICDCS), VOLUME: 2020-November
AUTHORS: Issa, S; Viegas, M; Raminhas, P; Machado, N; Matos, M ; Romano, P;
PUBLISHED: 2020, SOURCE: 40th IEEE International Conference on Distributed Computing Systems (ICDCS) in 2020 IEEE 40TH INTERNATIONAL CONFERENCE ON DISTRIBUTED COMPUTING SYSTEMS (ICDCS), VOLUME: 2020-November
INDEXED IN: Scopus WOS 
DBLP
Scopus WOS DBLP3
TITLE: Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures
AUTHORS: Ricardo Filipe; Shady Issa; Paolo Romano; João Barreto;
PUBLISHED: 2020, SOURCE: CoRR, VOLUME: abs/2003.03317
AUTHORS: Ricardo Filipe; Shady Issa; Paolo Romano; João Barreto;
PUBLISHED: 2020, SOURCE: CoRR, VOLUME: abs/2003.03317
INDEXED IN: DBLP
DBLP4
TITLE: Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures
AUTHORS: Ricardo Filipe; Shady Issa; Paolo Romano; Joao Barreto;
PUBLISHED: 2019, SOURCE: 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP) in PROCEEDINGS OF THE 24TH SYMPOSIUM ON PRINCIPLES AND PRACTICE OF PARALLEL PROGRAMMING (PPOPP '19)
AUTHORS: Ricardo Filipe; Shady Issa; Paolo Romano; Joao Barreto;
PUBLISHED: 2019, SOURCE: 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP) in PROCEEDINGS OF THE 24TH SYMPOSIUM ON PRINCIPLES AND PRACTICE OF PARALLEL PROGRAMMING (PPOPP '19)
INDEXED IN: Scopus WOS
Scopus WOS5
TITLE: Stretching the capacity of hardware transactional memory in IBM POWER architectures
AUTHORS: Ricardo Filipe; Shady Issa; Paolo Romano; João Barreto;
PUBLISHED: 2019, SOURCE: Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2019, Washington, DC, USA, February 16-20, 2019
AUTHORS: Ricardo Filipe; Shady Issa; Paolo Romano; João Barreto;
PUBLISHED: 2019, SOURCE: Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2019, Washington, DC, USA, February 16-20, 2019
INDEXED IN: DBLP
DBLP6
TITLE: Enhancing Efficiency of Hybrid Transactional Memory via Dynamic Data Partitioning Schemes
AUTHORS: Pedro Raminhas; Shady Issa; Paolo Romano ;
PUBLISHED: 2018, SOURCE: 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid) in 2018 18TH IEEE/ACM INTERNATIONAL SYMPOSIUM ON CLUSTER, CLOUD AND GRID COMPUTING (CCGRID)
AUTHORS: Pedro Raminhas; Shady Issa; Paolo Romano ;
PUBLISHED: 2018, SOURCE: 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid) in 2018 18TH IEEE/ACM INTERNATIONAL SYMPOSIUM ON CLUSTER, CLOUD AND GRID COMPUTING (CCGRID)
INDEXED IN: Scopus WOS
Scopus WOS