Isabel Maria Silva Nobre Parreira Cacho Teixeira
AuthID: R-000-6DS
21
TITLE: The CMS experiment at the CERN LHC
AUTHORS: The CMS Collaboration; Chatrchyan, S; Hmayakyan, G; Khachatryan, V; Sirunyan, AM; Adam, W; Bauer, T; Bergauer, T; Bergauer, H; Dragicevic, M; Erö, J; Friedl, M; Frühwirth, R; Ghete, VM; Glaser, P; Hartl, C; Hoermann, N; Hrubec, J; Hänsel, S; Jeitler, M; ...More
PUBLISHED: 2008, SOURCE: J. Inst. - Journal of Instrumentation, VOLUME: 3, ISSUE: 08
AUTHORS: The CMS Collaboration; Chatrchyan, S; Hmayakyan, G; Khachatryan, V; Sirunyan, AM; Adam, W; Bauer, T; Bergauer, T; Bergauer, H; Dragicevic, M; Erö, J; Friedl, M; Frühwirth, R; Ghete, VM; Glaser, P; Hartl, C; Hoermann, N; Hrubec, J; Hänsel, S; Jeitler, M; ...More
PUBLISHED: 2008, SOURCE: J. Inst. - Journal of Instrumentation, VOLUME: 3, ISSUE: 08
22
TITLE: Editorial: Design of circuits and integrated systems Full Text
AUTHORS: Paulo Teixeira, J; Silva Matos, J; Tomas, J; Cacho Teixeira, I;
PUBLISHED: 2007, SOURCE: IET Computers & Digital Techniques - IET Comput. Digit. Tech., VOLUME: 1, ISSUE: 5
AUTHORS: Paulo Teixeira, J; Silva Matos, J; Tomas, J; Cacho Teixeira, I;
PUBLISHED: 2007, SOURCE: IET Computers & Digital Techniques - IET Comput. Digit. Tech., VOLUME: 1, ISSUE: 5
23
TITLE: Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip Full Text
AUTHORS: Barros B Júnior; Rodriguez-Irago, M; Santos, MB; Teixeira, IC; Vargas, F; Teixeira, JP;
PUBLISHED: 2005, SOURCE: J Electron Test - Journal of Electronic Testing, VOLUME: 21, ISSUE: 4
AUTHORS: Barros B Júnior; Rodriguez-Irago, M; Santos, MB; Teixeira, IC; Vargas, F; Teixeira, JP;
PUBLISHED: 2005, SOURCE: J Electron Test - Journal of Electronic Testing, VOLUME: 21, ISSUE: 4
24
TITLE: Self-checking and fault tolerance quality assessment using Fault Sampling
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2002, SOURCE: 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems in 17TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, VOLUME: 2002-January
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2002, SOURCE: 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems in 17TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, VOLUME: 2002-January
25
TITLE: Optimizing functional distribution in complex system design
AUTHORS: Dias, OP; Teixeira, IM; Teixeira, JP; Becker, LB; Pereira, CE;
PUBLISHED: 2001, SOURCE: IFIP WG10 3/WG10 4/WG10 5 International Workshop on Distributed and Parallel Embedded Systems (DIPES 2000) in ARCHITECTURE AND DESIGN OF DISTRIBUTED EMBEDDED SYSTEMS, VOLUME: 61
AUTHORS: Dias, OP; Teixeira, IM; Teixeira, JP; Becker, LB; Pereira, CE;
PUBLISHED: 2001, SOURCE: IFIP WG10 3/WG10 4/WG10 5 International Workshop on Distributed and Parallel Embedded Systems (DIPES 2000) in ARCHITECTURE AND DESIGN OF DISTRIBUTED EMBEDDED SYSTEMS, VOLUME: 61
INDEXED IN:
Scopus
WOS


26
TITLE: RTL design validation, DFT and test pattern generation for high defects coverage
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: IEEE European Test Workshop (ETW 01) in ETW 2001: IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: IEEE European Test Workshop (ETW 01) in ETW 2001: IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
INDEXED IN:
WOS

27
TITLE: Design and test of certifiable ASICs for safety-critical gas burners control
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: 7th IEEE International On-Line Testing Workshop in SEVENTH IEEE INTERNATIONAL ON-LINE TESTING WORKSHOP, PROCEEDINGS
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: 7th IEEE International On-Line Testing Workshop in SEVENTH IEEE INTERNATIONAL ON-LINE TESTING WORKSHOP, PROCEEDINGS
INDEXED IN:
WOS

28
TITLE: Test resource partitioning: a design & test issue
AUTHORS: Teixeira, JP; Teixeira, IM; Pereira, CE; Dias, OP; Jorge Semião ;
PUBLISHED: 2001, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 2001) in DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS
AUTHORS: Teixeira, JP; Teixeira, IM; Pereira, CE; Dias, OP; Jorge Semião ;
PUBLISHED: 2001, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 2001) in DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS
29
TITLE: Towards e-management as enabler for accelerated change
AUTHORS: Lérias, H; Luz, J; Moura, P; Mendes, A; Teixeira, I; Teixeira, JP;
PUBLISHED: 2001, SOURCE: 3rd International Conference on Enterprise Information Systems, ICEIS 2001 in ICEIS 2001 - Proceedings of the 3rd International Conference on Enterprise Information Systems, VOLUME: 2
AUTHORS: Lérias, H; Luz, J; Moura, P; Mendes, A; Teixeira, I; Teixeira, JP;
PUBLISHED: 2001, SOURCE: 3rd International Conference on Enterprise Information Systems, ICEIS 2001 in ICEIS 2001 - Proceedings of the 3rd International Conference on Enterprise Information Systems, VOLUME: 2
INDEXED IN:
Scopus

30
TITLE: RTL-based functional test generation for high defects coverage in digital SOCs
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2000, SOURCE: IEEE European Test Workshop in IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2000, SOURCE: IEEE European Test Workshop in IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
INDEXED IN:
WOS
