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TITLE: Efficient Design of Low Bitwidth Convolutional Neural Networks on FPGA with Optimized Dot Product Units  Full Text
AUTHORS: Vestias, Mario; Duarte, Rui P.; de Sousa, Jose T.; Neto, Horacio;
PUBLISHED: 2023, SOURCE: ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS, VOLUME: 16, ISSUE: 1
INDEXED IN: Scopus WOS
2
TITLE: Energy-Efficient and Real-Time Wearable for Wellbeing-Monitoring IoT System Based on SoC-FPGA  Full Text
AUTHORS: Frutuoso, Maria Ines; Neto, Horacio C.; Vestias, Mario P.; Duarte, Rui Policarpo;
PUBLISHED: 2023, SOURCE: ALGORITHMS, VOLUME: 16, ISSUE: 3
INDEXED IN: Scopus WOS
3
TITLE: Fire Behaviour of GFRP-Reinforced Concrete Slab Strips: Fire Resistance Tests and Numerical Simulation
AUTHORS: Duarte, Antonio P. C.; Rosa, Ines C.; Arruda, Mario R. T.; Firmo, Joao P.; Correia, Joao R.;
PUBLISHED: 2022, SOURCE: 10th International Conference on Fibre-Reinforced Polymer (FRP) Composites in Civil Engineering (CICE) in 10TH INTERNATIONAL CONFERENCE ON FRP COMPOSITES IN CIVIL ENGINEERING (CICE 2020/2021), VOLUME: 198
INDEXED IN: Scopus WOS
5
TITLE: Onboard Processing of Synthetic Aperture Radar Backprojection Algorithm in FPGA
AUTHORS: Mota, David; Cruz, Helena; Miranda, Pedro R.; Duarte, Rui Policarpo; de Sousa, Jose T.; Neto, Horacio C.; Vestias, Mario P.;
PUBLISHED: 2022, SOURCE: IEEE JOURNAL OF SELECTED TOPICS IN APPLIED EARTH OBSERVATIONS AND REMOTE SENSING, VOLUME: 15
INDEXED IN: WOS
6
TITLE: Coarse-Grained Reconfigurable Computing with the Versat Architecture  Full Text
AUTHORS: Lopes, JD; Vestias, MP; Duarte, RP; Neto, HC; de Sousa, JT;
PUBLISHED: 2021, SOURCE: ELECTRONICS, VOLUME: 10, ISSUE: 6
INDEXED IN: Scopus WOS
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TITLE: A Full Featured Configurable Accelerator for Object Detection With YOLO
AUTHORS: Pestana, D; Miranda, PR; Lopes, JD; Duarte, RP; Vestias, MP; Neto, HC; De Sousa, JT;
PUBLISHED: 2021, SOURCE: IEEE ACCESS, VOLUME: 9
INDEXED IN: Scopus WOS
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TITLE: Reconfigurable Accelerator for On-Board SAR Imaging Using the Backprojection Algorithm
AUTHORS: Duarte, RP; Cruz, H; Neto, H;
PUBLISHED: 2020, SOURCE: 16th International Symposium on Applied Reconfigurable Computing, ARC 2020 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 12083 LNCS
INDEXED IN: Scopus
9
TITLE: A fast and scalable architecture to run convolutional neural networks in low density FPGAs
AUTHORS: Véstias, MP; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLISHED: 2020, SOURCE: Microprocessors and Microsystems, VOLUME: 77
INDEXED IN: Scopus
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TITLE: A Configurable Architecture for Running Hybrid Convolutional Neural Networks in Low-Density FPGAs
AUTHORS: Mario P Vestias; Rui P Duarte; Jose T De Sousa; Horacio C Neto;
PUBLISHED: 2020, SOURCE: IEEE ACCESS, VOLUME: 8
INDEXED IN: Scopus WOS
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