José Alfredo Ribeiro da Silva Matos
AuthID: R-000-803
11
TITLE: Introduction to “Computer Organisation, Programming and Benchmarking Introduction”
AUTHORS: José Silva Matos;
PUBLISHED: 1999, SOURCE: Vector and Parallel Processing – VECPAR’98 - Lecture Notes in Computer Science
AUTHORS: José Silva Matos;
PUBLISHED: 1999, SOURCE: Vector and Parallel Processing – VECPAR’98 - Lecture Notes in Computer Science
12
TITLE: Mixed hardware/software applications on dynamically reconfigurable hardware
AUTHORS: João Canas Ferreira ; José Silva Matos;
PUBLISHED: 1998, SOURCE: ICECS, VOLUME: 1
AUTHORS: João Canas Ferreira ; José Silva Matos;
PUBLISHED: 1998, SOURCE: ICECS, VOLUME: 1
13
TITLE: Flexible hardware acceleration for nesting problems
AUTHORS: João Canas Ferreira ; José Carlos Alves ; Célio Albuquerque; José Fernando Oliveira ; José Soeiro Ferreira ; José Silva Matos;
PUBLISHED: 1998, SOURCE: ICECS, VOLUME: 1
AUTHORS: João Canas Ferreira ; José Carlos Alves ; Célio Albuquerque; José Fernando Oliveira ; José Soeiro Ferreira ; José Silva Matos;
PUBLISHED: 1998, SOURCE: ICECS, VOLUME: 1
14
TITLE: Implementation of mixed current/voltage testing using the IEEE P1149.4 infrastructure Full Text
AUTHORS: da Silva, JM ; Leao, AC; Alves, JC ; Matos, JS;
PUBLISHED: 1997, SOURCE: International Test Conference 1997 (ITC) in ITC - INTERNATIONAL TEST CONFERENCE 1997, PROCEEDINGS: INTEGRATING MILITARY AND COMMERCIAL COMMUNICATIONS FOR THE NEXT CENTURY
AUTHORS: da Silva, JM ; Leao, AC; Alves, JC ; Matos, JS;
PUBLISHED: 1997, SOURCE: International Test Conference 1997 (ITC) in ITC - INTERNATIONAL TEST CONFERENCE 1997, PROCEEDINGS: INTEGRATING MILITARY AND COMMERCIAL COMMUNICATIONS FOR THE NEXT CENTURY
15
TITLE: A vector architecture for higher-order moments estimation
AUTHORS: Alves, JC ; Puga, A; CorteReal, L ; Matos, JS;
PUBLISHED: 1997, SOURCE: 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 97) in 1997 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I - V: VOL I: PLENARY, EXPERT SUMMARIES, SPECIAL, AUDIO, UNDERWATER ACOUSTICS, VLSI; VOL II: SPEECH PROCESSING; VOL III: SPEECH PROCESSING, DIGITAL SIGNAL PROCESSING; VOL IV: MULTIDIMENSIONAL SIGNAL PROCESSING, NEURAL NETWORKS - VOL V: STATISTICAL SIGNAL AND ARRAY PROCESSING, APPLICATIONS, VOLUME: 5
AUTHORS: Alves, JC ; Puga, A; CorteReal, L ; Matos, JS;
PUBLISHED: 1997, SOURCE: 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 97) in 1997 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I - V: VOL I: PLENARY, EXPERT SUMMARIES, SPECIAL, AUDIO, UNDERWATER ACOUSTICS, VLSI; VOL II: SPEECH PROCESSING; VOL III: SPEECH PROCESSING, DIGITAL SIGNAL PROCESSING; VOL IV: MULTIDIMENSIONAL SIGNAL PROCESSING, NEURAL NETWORKS - VOL V: STATISTICAL SIGNAL AND ARRAY PROCESSING, APPLICATIONS, VOLUME: 5
INDEXED IN: 
Scopus 
WOS
Scopus WOS IN MY: 
ORCID
ORCID16
TITLE: Evaluation of i(DD)/V-OUT cross-correlation for mixed current/voltage testing of analogue and mixed-signal circuits Full Text
AUTHORS: daSilva, JM ; Matos, JS;
PUBLISHED: 1996, SOURCE: European Design and Test Conference in EUROPEAN DESIGN & TEST CONFERENCE 1996 - ED&TC 96, PROCEEDINGS
AUTHORS: daSilva, JM ; Matos, JS;
PUBLISHED: 1996, SOURCE: European Design and Test Conference in EUROPEAN DESIGN & TEST CONFERENCE 1996 - ED&TC 96, PROCEEDINGS
INDEXED IN: Scopus WOS
Scopus WOS IN MY: ORCID
ORCID17
TITLE: CROSS-CORRELATION BETWEEN I(DD) AND V(OUT) SIGNALS FOR TESTING ANALOG CIRCUITS
AUTHORS: DASILVA, JM ; MATOS, JS; BELL, IM; TAYLOR, GE;
PUBLISHED: 1995, SOURCE: ELECTRONICS LETTERS, VOLUME: 31, ISSUE: 19
AUTHORS: DASILVA, JM ; MATOS, JS; BELL, IM; TAYLOR, GE;
PUBLISHED: 1995, SOURCE: ELECTRONICS LETTERS, VOLUME: 31, ISSUE: 19
18
TITLE: AN IC ARCHITECTURE FOR BOARD-LEVEL MIXED-SIGNAL TEST SUPPORT
AUTHORS: FERREIRA, JC ; LEAO, AC; DASILVA, JM ; MATOS, JS;
PUBLISHED: 1994, SOURCE: 7th Mediterranean Electrotechnical Conference (MeleCON 94) in 7TH MEDITERRANEAN ELECTROTECHNICAL CONFERENCE, VOLS 1-3, VOLUME: 2
AUTHORS: FERREIRA, JC ; LEAO, AC; DASILVA, JM ; MATOS, JS;
PUBLISHED: 1994, SOURCE: 7th Mediterranean Electrotechnical Conference (MeleCON 94) in 7TH MEDITERRANEAN ELECTROTECHNICAL CONFERENCE, VOLS 1-3, VOLUME: 2
19
TITLE: A BOUNDARY SCAN TEST CONTROLLER FOR HIERARCHICAL BIST
AUTHORS: MATOS, JS; PINTO, FS; FERREIRA, JMM;
PUBLISHED: 1992, SOURCE: INTERNATIONAL TEST CONFERENCE 1992 : PROCEEDINGS
AUTHORS: MATOS, JS; PINTO, FS; FERREIRA, JMM;
PUBLISHED: 1992, SOURCE: INTERNATIONAL TEST CONFERENCE 1992 : PROCEEDINGS
INDEXED IN: WOS
WOS IN MY: ORCID
ORCID20
TITLE: Boundary scan test, test methodology, and fault modeling
AUTHORS: De Jong, F; Matos, JS; Ferreira, JM;
PUBLISHED: 1991, SOURCE: Journal of Electronic Testing, VOLUME: 2, ISSUE: 1
AUTHORS: De Jong, F; Matos, JS; Ferreira, JM;
PUBLISHED: 1991, SOURCE: Journal of Electronic Testing, VOLUME: 2, ISSUE: 1
