Combining Flexibility with Low Power: Dataflow and Wide-Pipeline Ldpc Decoding Engines in the Gbit/S Era

AuthID
P-009-S4N
5
Author(s)
Andrade, J
·
Pratas, F
·
Silva, V
·
Document Type
Proceedings Paper
Year published
2014
Published
in PROCEEDINGS OF THE 2014 IEEE 25TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2014) in Proceedings IEEE International Conference of Application-Specific Systems Architectures and Processors, ISSN: 2160-0511
Pages: 264-269 (6)
Conference
Ieee 25Th International Conference on Application-Specific Systems, Architectures and Processors (Asap), Date: JUN 18-20, 2014, Location: Zurich, SWITZERLAND, Sponsors: IEEE, IEEE Comp Soc, ETH, Swiss Fed Inst Technol, Host: IBM Res
Indexing
Publication Identifiers
Dblp: conf/asap/AndradePFSS14
Scopus: 2-s2.0-84906350895
Wos: WOS:000345737000048
Source Identifiers
ISSN: 2160-0511
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