Automatic Layout Generation of Power Mosfet Transistors in Bulk Cmos

AuthID
 P-00G-2B2
3
Author(s)
Document Type
Proceedings Paper
Year published
2014
Published
in 2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) in IEEE International Conference on Electronics, Circuits and Systems
Pages: 606-609 (4)
Conference
2014 21St Ieee International Conference on Electronics, Circuits and Systems (Icecs), Date: DEC 07-10, 2014, Location: Marseille, FRANCE, Sponsors: National Instruments, INVIA, ANSYS, IEEE, CAS, ARCSIS, SOLUTIONS COMMUNICANTES SECURISEES, CNRS, Region PACA, Marseille.fr Site Officiel de la Ville de Marseille, IM2NP, Aix*Marseille Universite, UNIVERSITE DE TOULON, ISEN ecole d'ingenieurs, POLYTECH MARSEILLE Aix*Marseille Universite
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Publication Identifiers
Scopus: 2-s2.0-84925400453
Wos: WOS:000380548000153
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