Reducing Misses to External Memory Accesses in Task-Level Pipelining

AuthID
 P-00G-SYF
2
Author(s)
Document Type
Proceedings Paper
Year published
2015
Published
in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) in IEEE International Symposium on Circuits and Systems, ISSN: 0271-4302
Volume: 2015-July, Pages: 1422-1425 (4)
Conference
Ieee International Symposium on Circuits and Systems (Iscas), Date: MAY 24-27, 2015, Location: Lisbon, PORTUGAL, Sponsors: IEEE
Indexing
Wos®
Scopus®
Dblp®/en/publications/view/550863
Crossref®
Google Scholar®
Publication Identifiers
Dblp: conf/iscas/AzarianC15
Scopus: 2-s2.0-84946222134
Wos: WOS:000371471001176
Source Identifiers
ISSN: 0271-4302
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