Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency Ics

AuthID
P-00V-DN3
8
Author(s)
Roca, E
·
Castro Lopez, R
·
Horta, N
·
Fernandez, FV
Document Type
Article
Year published
2021
Published
in IEEE ACCESS, ISSN: 2169-3536
Volume: 9, Pages: 124152-124164 (13)
Indexing
Publication Identifiers
Wos: WOS:000696059300001
Source Identifiers
ISSN: 2169-3536
Export Publication Metadata
Marked List
Info
At this moment we don't have any links to full text documens.