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João Manuel Paiva Cardoso
AuthID:
R-000-75E
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Document Source:
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Proceedings Paper (126)
Article (56)
Editorial Material (27)
Book Chapter (23)
Proceedings (10)
Book (6)
Unpublished (5)
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Results:
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Confirmed Publications: 253
221
TITLE:
Mesh Mapping Exploration for Coarse-Grained Reconfigurable Array Architectures
AUTHORS:
Marcos Vinícius da Silva;
Ricardo S Ferreira
; Alisson Garcia;
João M P Cardoso
;
PUBLISHED:
2006
,
SOURCE:
2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006
in
2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006
INDEXED IN:
Scopus
DBLP
CrossRef
:
8
IN MY:
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DBLP
222
TITLE:
Reconfigurable Computing: Architectures and Applications. Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006 Revised Selected Papers (Lecture Notes in Computer Science)
AUTHORS:
Koen Bertels;
João M P Cardoso
; Stamatis Vassiliadis;
PUBLISHED:
2006
,
SOURCE:
Lecture Notes in Computer Science
INDEXED IN:
CrossRef
Openlibrary
IN MY:
ORCID
|
ResearcherID
223
TITLE:
Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers
AUTHORS:
Koen Bertels
;
João M P Cardoso
; Stamatis Vassiliadis;
PUBLISHED:
2006
,
SOURCE:
ARC,
VOLUME:
3985
INDEXED IN:
DBLP
IN MY:
ORCID
|
DBLP
224
TITLE:
Regular expression matching for reconfigurable packet inspection
AUTHORS:
Joao Bispo
;
Ioannis Sourdis
;
Joao M P Cardoso
;
Stamatis Vassiliadis
;
PUBLISHED:
2006
,
SOURCE:
5th IEEE International Conference on Field Programmable Technology
in
2006 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
73
IN MY:
ORCID
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ResearcherID
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DBLP
225
TITLE:
A test infrastructure for compilers targeting FPGAs
AUTHORS:
Rodrigues, RMM;
Cardoso, JMP
;
PUBLISHED:
2005
,
SOURCE:
International Workshop on Applied Reconfigurable Computing 2005, ARC 2005
in
ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005
INDEXED IN:
Scopus
IN MY:
ORCID
226
TITLE:
An infrastructure to functionally test designs generated by compilers targeting FPGAs
PDF
Full Text
AUTHORS:
Rodrigues, R;
Cardoso, JMP
;
PUBLISHED:
2005
,
SOURCE:
Design, Automation and Test in Europe Conference and Exhibition (DATE 05)
in
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS,
VOLUME:
I
INDEXED IN:
Scopus
WOS
DBLP
arXiv
CrossRef
:
3
IN MY:
ORCID
|
ResearcherID
|
DBLP
227
TITLE:
CHIADO - Compilation of high-level computationally intensive algorithms to dynamically reconfligurable computing systems
AUTHORS:
Cardoso, JMP
;
PUBLISHED:
2005
,
SOURCE:
Conference on VLSI Circuits and Systems II
in
VLSI Circuits and Systems II, Pts 1 and 2,
VOLUME:
5837
INDEXED IN:
Scopus
WOS
CrossRef
:
1
IN MY:
ORCID
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ResearcherID
228
TITLE:
Compilation and temporal partitioning for a coarse-grain reconfigurable architecture
Full Text
AUTHORS:
Cardoso, JMP
;
Weinhardt, M
;
PUBLISHED:
2005
,
SOURCE:
New Algorithms, Architectures and Applications for Reconfigurable Computing
INDEXED IN:
Scopus
CrossRef
:
2
IN MY:
ORCID
|
ResearcherID
229
TITLE:
Data-driven array architectures: a rebirth?
AUTHORS:
Cardoso, JMP
;
PUBLISHED:
2005
,
SOURCE:
Conference on VLSI Circuits and Systems II
in
VLSI Circuits and Systems II, Pts 1 and 2,
VOLUME:
5837
INDEXED IN:
Scopus
WOS
CrossRef
IN MY:
ORCID
|
ResearcherID
230
TITLE:
Data-driven regular reconfigurable arrays: Design space exploration and mapping
Full Text
AUTHORS:
Ferreira, R
;
Cardoso, JMP
; Toledo, A;
Neto, HC
;
PUBLISHED:
2005
,
SOURCE:
5th International Workshop on Embedded Computer Systems - Architectures, Modeling,, and Simulation
in
EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION,
VOLUME:
3553
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
2
IN MY:
ORCID
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ResearcherID
|
DBLP
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